- <https://bugs.libre-soc.org/show_bug.cgi?id=241> OpenPOWER simulator
- <https://bugs.libre-soc.org/show_bug.cgi?id=647> ISACaller basic FP
- <https://bugs.libre-soc.org/show_bug.cgi?id=52> SVP64 simulation
- - <https://bugs.libre-soc.org/show_bug.cgi?id=604> ISACaller RADIX MMU
- <https://bugs.libre-soc.org/show_bug.cgi?id=609> SVSTATE DMI
- <https://bugs.libre-soc.org/show_bug.cgi?id=588> SVP64 PowerDecoder2
- https://bugs.libre-soc.org/show_bug.cgi?id=575
- <https://bugs.libre-soc.org/show_bug.cgi?id=639> SVP64 test documentation
## Completed but not yet submitted:
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=604> ISACaller RADIX MMU
+ - EUR 800 shared
+ - EUR 500 [[lkcl]]
+ - EUR 300 [[tobias]]
- <https://bugs.libre-soc.org/show_bug.cgi?id=699> SVP64 Draft 0.1
- <https://bugs.libre-soc.org/show_bug.cgi?id=653> DCT and FFT REMAP
- EUR 1600