mem: fix bug in packet access endianness changes

The new Packet::setRaw() method incorrectly still contained
an htog() conversion.  As a result, calls to the old set()
method (now defined as setRaw(htog(v))) underwent two htog
conversions, which breaks things when htog() is not a no-op.

Interestingly the only test that caught this was a SPARC
boot test, where an IsaFake device with a non-zero return
value was getting swapped twice resulting in a register
getting loaded with 0x100000000000000 instead of 1.
(Good reason for keeping SPARC around, perhaps?)

diff --git a/src/mem/packet_access.hh b/src/mem/packet_access.hh
index 1a2db692182ffc52f47f3e12eb961338a9e60423..1fee979cef213a0ad9f7f7470039ab45c5e155d6 100644 (file)
--- a/src/mem/packet_access.hh
+++ b/src/mem/packet_access.hh
@@ -66,7 +66,7 @@ Packet::setRaw(T v)
 {
     assert(flags.isSet(STATIC_DATA|DYNAMIC_DATA));
     assert(sizeof(T) <= size);
-    *(T*)data = TheISA::htog(v);
+    *(T*)data = v;
 }