shorten wording

diff --git a/openpower/sv/rfc/ls002.mdwn b/openpower/sv/rfc/ls002.mdwn
index aafcac9a08bbc7218eed67b3e4b030bb70931dad..dca0fb6a99cdeb87537d86c2cec6f48600e08ace 100644 (file)
--- a/openpower/sv/rfc/ls002.mdwn
+++ b/openpower/sv/rfc/ls002.mdwn
@@ -60,10 +60,10 @@
 
 **Motivation**
 
-Similar to `lxvkq` but extended to a full bfloat16 with one
+Similar to `lxvkq` but extended to a bfloat16 with one
 32-bit instruction and a full FP32 in two 32-bit instructions
 these instructions always save a Data Load and associated L1
-and TLB lookup. Even quickly clearing an FPR to zero presently requires Load.
+and TLB lookup. Even quickly clearing an FPR to zero presently needs Load.
 
 **Notes and Observations**: