Brackets
authorEddie Hung <eddie@fpgeh.com>
Fri, 22 Nov 2019 23:41:34 +0000 (15:41 -0800)
committerEddie Hung <eddie@fpgeh.com>
Fri, 22 Nov 2019 23:41:34 +0000 (15:41 -0800)
passes/techmap/clkpart.cc

index 4fa72925089796ac04b57defa8c29995cd5cf571..bf3b5bd3056637ab3ab06bbec6b501bcccb93b74 100644 (file)
@@ -144,7 +144,7 @@ struct ClkPartPass : public Pass {
                                {
                                        bool this_clk_pol = cell->type.in(ID($_DFFE_PN_), ID($_DFFE_PP_));
                                        bool this_en_pol = !enable_mode || cell->type.in(ID($_DFFE_NP_), ID($_DFFE_PP_));
-                                       key = clkdomain_t(this_clk_pol, assign_map(cell->getPort(ID(C))), this_en_pol, enable_mode ? assign_map(cell->getPort(ID(E)) : RTLIL::SigSpec()));
+                                       key = clkdomain_t(this_clk_pol, assign_map(cell->getPort(ID(C))), this_en_pol, enable_mode ? assign_map(cell->getPort(ID(E))) : RTLIL::SigSpec());
                                }
                                else
                                        continue;