gallium: Add CAP for opcode DIV
authorGert Wollny <gert.wollny@collabora.com>
Fri, 14 Jun 2019 14:54:24 +0000 (16:54 +0200)
committerGert Wollny <gert.wollny@collabora.com>
Sun, 30 Jun 2019 16:41:35 +0000 (18:41 +0200)
Not all drivers support TGSI_OPCODE_DIV, so we should have a cap to be able
to check this.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
src/gallium/auxiliary/util/u_screen.c
src/gallium/docs/source/screen.rst
src/gallium/drivers/llvmpipe/lp_screen.c
src/gallium/drivers/nouveau/nv30/nv30_screen.c
src/gallium/drivers/nouveau/nv50/nv50_screen.c
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
src/gallium/drivers/radeonsi/si_get.c
src/gallium/drivers/softpipe/sp_screen.c
src/gallium/drivers/svga/svga_screen.c
src/gallium/include/pipe/p_defines.h

index a991bd6dce27f4280e9e6650e51a4fa3a3e9d470..3feb0b5f37c98d2c3dd6d2e78f4b836ff338f523 100644 (file)
@@ -283,6 +283,7 @@ u_pipe_screen_get_param_defaults(struct pipe_screen *pscreen,
    case PIPE_CAP_TGSI_BALLOT:
    case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
    case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
+   case PIPE_CAP_TGSI_DIV:
       return 0;
 
    case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
index fda9ebdb6fd38cde3a8de388eebee985a706ebeb..596a17f32ebf513c770aeec4dc91008f8a39acb6 100644 (file)
@@ -533,6 +533,7 @@ The integer capabilities:
   lower those system values.
 * ``PIPE_CAP_ATOMIC_FLOAT_MINMAX``: Atomic float point minimum,
   maximum, exchange and compare-and-swap support to buffer and shared variables.
+* ``PIPE_CAP_TGSI_DIV``: Whether opcode DIV is supported
 
 .. _pipe_capf:
 
index bfe7a37867910943059215d4f6afffd7051d7a63..3d5fbb06231c82812f2087f911eafa8a9a2418eb 100644 (file)
@@ -271,6 +271,7 @@ llvmpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_INT64:
    case PIPE_CAP_INT64_DIVMOD:
    case PIPE_CAP_QUERY_SO_OVERFLOW:
+   case PIPE_CAP_TGSI_DIV:
       return 1;
 
    case PIPE_CAP_VENDOR_ID:
index 0f9ec6673b54ce0ebb95ae002aad005d7443c17b..20738e3a95f9d41ca943bfed01327c7b4a5448c7 100644 (file)
@@ -247,6 +247,7 @@ nv30_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
    case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
    case PIPE_CAP_IMAGE_LOAD_FORMATTED:
+   case PIPE_CAP_TGSI_DIV:
       return 0;
 
    case PIPE_CAP_MAX_GS_INVOCATIONS:
index a17c0a9352b1b084b25c514ef096a9c980acadef..b84330b4b3812195054d8daf05192e4f6eea62de 100644 (file)
@@ -218,6 +218,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
    case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
    case PIPE_CAP_DEST_SURFACE_SRGB_CONTROL:
+   case PIPE_CAP_TGSI_DIV:
       return 1;
    case PIPE_CAP_SEAMLESS_CUBE_MAP:
       return 1; /* class_3d >= NVA0_3D_CLASS; */
index 4d26568d391e099458144e1a109c6b1dab988244..3a543e54d1f3d5261f9e478f9b2f8d1665f6ad5d 100644 (file)
@@ -277,6 +277,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
    case PIPE_CAP_QUERY_SO_OVERFLOW:
    case PIPE_CAP_DEST_SURFACE_SRGB_CONTROL:
+   case PIPE_CAP_TGSI_DIV:
       return 1;
    case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
       return nouveau_screen(pscreen)->vram_domain & NOUVEAU_BO_VRAM ? 1 : 0;
index 5c2806341b3f5bb29c1c3ee2f54da0e80613a7ee..3ed90c79cbafafe801d34d866a520c04d9cda518 100644 (file)
@@ -156,6 +156,7 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
        case PIPE_CAP_COMPUTE_GRID_INFO_LAST_BLOCK:
        case PIPE_CAP_IMAGE_LOAD_FORMATTED:
        case PIPE_CAP_PREFER_COMPUTE_BLIT_FOR_MULTIMEDIA:
+        case PIPE_CAP_TGSI_DIV:
                return 1;
 
        case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
index 8e4074ac01ae2fb07f883976142d6e118efa69fa..f9f2e9fc077ba9b2e5ecaa4bf1ff61a79be8d2c0 100644 (file)
@@ -174,6 +174,7 @@ softpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_DOUBLES:
    case PIPE_CAP_INT64:
    case PIPE_CAP_INT64_DIVMOD:
+   case PIPE_CAP_TGSI_DIV:
       return 1;
    case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
       return 16;
index c76d77f1bc24715b67af9580a0d53463c25c56a4..373dfcec3a31cf42616e61734afb0a341675ad71 100644 (file)
@@ -479,6 +479,8 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_PACKED_UNIFORMS:
    case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
       return 0;
+   case PIPE_CAP_TGSI_DIV:
+      return 1;
    case PIPE_CAP_MAX_GS_INVOCATIONS:
       return 32;
    case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
index 74a9a86892451baa909ed69b4a5d5ff1c062ce55..536f321edfda834520621199490f7b62144ef2ee 100644 (file)
@@ -887,6 +887,7 @@ enum pipe_cap
    PIPE_CAP_FBFETCH_COHERENT,
    PIPE_CAP_CS_DERIVED_SYSTEM_VALUES_SUPPORTED,
    PIPE_CAP_ATOMIC_FLOAT_MINMAX,
+   PIPE_CAP_TGSI_DIV,
 };
 
 /**