unsigned index,
const struct tgsi_full_declaration *decl);
+ void (*declare_memory_region)(struct radeon_llvm_context *,
+ const struct tgsi_full_declaration *decl);
+
/** This array contains the input values for the shader. Typically these
* values will be in the form of a target intrinsic that will inform the
* backend how to load the actual inputs to the shader.
LLVMTypeRef v4i32;
LLVMTypeRef v4f32;
LLVMTypeRef v8i32;
+
+ LLVMValueRef shared_memory;
};
static struct si_shader_context *si_shader_context(
radeon_bld->system_values[index] = value;
}
+static void declare_compute_memory(struct radeon_llvm_context *radeon_bld,
+ const struct tgsi_full_declaration *decl)
+{
+ struct si_shader_context *ctx =
+ si_shader_context(&radeon_bld->soa.bld_base);
+ struct si_shader_selector *sel = ctx->shader->selector;
+ struct gallivm_state *gallivm = &radeon_bld->gallivm;
+
+ LLVMTypeRef i8p = LLVMPointerType(ctx->i8, LOCAL_ADDR_SPACE);
+ LLVMValueRef var;
+
+ assert(decl->Declaration.MemType == TGSI_MEMORY_TYPE_SHARED);
+ assert(decl->Range.First == decl->Range.Last);
+ assert(!ctx->shared_memory);
+
+ var = LLVMAddGlobalInAddressSpace(gallivm->module,
+ LLVMArrayType(ctx->i8, sel->local_size),
+ "compute_lds",
+ LOCAL_ADDR_SPACE);
+ LLVMSetAlignment(var, 4);
+
+ ctx->shared_memory = LLVMBuildBitCast(gallivm->builder, var, i8p, "");
+}
+
static LLVMValueRef fetch_constant(
struct lp_build_tgsi_context *bld_base,
const struct tgsi_full_src_register *reg,
bld_base->emit_epilogue = si_llvm_return_fs_outputs;
break;
case TGSI_PROCESSOR_COMPUTE:
+ ctx.radeon_bld.declare_memory_region = declare_compute_memory;
break;
default:
assert(!"Unsupported shader type");