liteeth/mac/core: add with_padding option (enabled by default) and change with_hw_pre...

diff --git a/misoclib/com/liteeth/mac/core/__init__.py b/misoclib/com/liteeth/mac/core/__init__.py
index f57cada2879cd84c49e0c34f2d9fba7256413415..50b6e8e37fe616138470a4ee962d32ab6b2fc937 100644 (file)
--- a/misoclib/com/liteeth/mac/core/__init__.py
+++ b/misoclib/com/liteeth/mac/core/__init__.py
@@ -4,7 +4,9 @@ from misoclib.com.liteeth.mac.core import gap, preamble, crc, padding, last_be
 from misoclib.com.liteeth.phy.sim import LiteEthPHYSim
 
 class LiteEthMACCore(Module, AutoCSR):
-       def __init__(self, phy, dw, endianness="big", with_hw_preamble_crc=True):
+       def __init__(self, phy, dw, endianness="big",
+                       with_preamble_crc=True,
+                       with_padding=True):
                if dw < phy.dw:
                        raise ValueError("Core data width({}) must be larger than PHY data width({})".format(dw, phy.dw))
 
@@ -24,9 +26,9 @@ class LiteEthMACCore(Module, AutoCSR):
                if isinstance(phy, LiteEthPHYSim):
                        # In simulation, avoid CRC/Preamble to enable direct connection
                        # to the Ethernet tap.
-                       self._hw_preamble_crc = CSRStatus(reset=1)
-               elif with_hw_preamble_crc:
-                       self._hw_preamble_crc = CSRStatus(reset=1)
+                       self._preamble_crc = CSRStatus(reset=1)
+               elif with_preamble_crc:
+                       self._preamble_crc = CSRStatus(reset=1)
                        # Preamble insert/check
                        preamble_inserter = preamble.LiteEthMACPreambleInserter(phy.dw)
                        preamble_checker = preamble.LiteEthMACPreambleChecker(phy.dw)
@@ -43,13 +45,14 @@ class LiteEthMACCore(Module, AutoCSR):
                        rx_pipeline += [preamble_checker, crc32_checker]
 
                # Padding
-               padding_inserter = padding.LiteEthMACPaddingInserter(phy.dw, 60)
-               padding_checker = padding.LiteEthMACPaddingChecker(phy.dw, 60)
-               self.submodules += RenameClockDomains(padding_inserter, "eth_tx")
-               self.submodules += RenameClockDomains(padding_checker, "eth_rx")
-
-               tx_pipeline += [padding_inserter]
-               rx_pipeline += [padding_checker]
+               if with_padding:
+                       padding_inserter = padding.LiteEthMACPaddingInserter(phy.dw, 60)
+                       padding_checker = padding.LiteEthMACPaddingChecker(phy.dw, 60)
+                       self.submodules += RenameClockDomains(padding_inserter, "eth_tx")
+                       self.submodules += RenameClockDomains(padding_checker, "eth_rx")
+
+                       tx_pipeline += [padding_inserter]
+                       rx_pipeline += [padding_checker]
 
                # Delimiters
                if dw != 8:

diff --git a/software/libnet/microudp.c b/software/libnet/microudp.c
index fa69afe90e888b7d76d2f82d5c049e690f062fe7..8720407e1c6b97ab578da226cb266144bf8c3349 100644 (file)
--- a/software/libnet/microudp.c
+++ b/software/libnet/microudp.c
@@ -12,7 +12,7 @@
 #define ETHERTYPE_ARP 0x0806
 #define ETHERTYPE_IP  0x0800
 
-#ifdef CSR_ETHMAC_HW_PREAMBLE_CRC_ADDR
+#ifdef CSR_ETHMAC_PREAMBLE_CRC_ADDR
 #define HW_PREAMBLE_CRC
 #endif