i386.md (SImode logical compare): Avoid outputing non-pariable testw and testl on...

        * i386.md (SImode logical compare): Avoid outputing non-pariable testw
        and testl on Pentium.
        (register and memory bit tests): Likewise.
        (setcc, normal and reversed conditional branches): Use shorter
        sequence for testing flags stored in EAX.

From-SVN: r26437

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4897998955c4bcc087c584440f4c72f53a21bdd4..aa61163fd154aecdcf3c6881e8360681ccaf21b0 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,11 @@
 Wed Apr 14 00:18:22 1999  Jan Hubicka <hubicka@freesoft.cz>
 
+       * i386.md (SImode logical compare): Avoid outputing non-pariable testw
+       and testl on Pentium.
+       (register and memory bit tests): Likewise.
+       (setcc, normal and reversed conditional branches): Use shorter
+       sequence for testing flags stored in EAX.
+
        * i386.md (xorsi3): Do not output NOT instrctions on Pentium.
        (xorqi3): Likewise.
        (xorhi3): Likewise.

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 5ad2c175b7b8c54848cfe377e5dd66558ffc316d..b1b681d6cc304a2f496dfab7e22e5fbc0af4e296 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -767,7 +767,10 @@
   /* For small integers, we may actually use testb. */
   if (GET_CODE (operands[1]) == CONST_INT
       && ! (GET_CODE (operands[0]) == MEM && MEM_VOLATILE_P (operands[0]))
-      && (! REG_P (operands[0]) || QI_REG_P (operands[0])))
+      && (! REG_P (operands[0]) || QI_REG_P (operands[0]))
+      /* A Pentium test is pairable only with eax. Not with ah or al.  */
+      && (! REG_P (operands[0]) || REGNO (operands[0]) || !TARGET_PENTIUM
+          || optimize_size))
     {
       /* We may set the sign bit spuriously.  */
 
@@ -5723,7 +5726,10 @@ else
   mask = ((1 << INTVAL (operands[1])) - 1) << INTVAL (operands[2]);
   operands[1] = GEN_INT (mask);
 
-  if (QI_REG_P (operands[0]))
+  if (QI_REG_P (operands[0])
+      /* A Pentium test is pairable only with eax. Not with ah or al.  */
+      && (! REG_P (operands[0]) || REGNO (operands[0]) || !TARGET_PENTIUM
+          || optimize_size))
     {
       if ((mask & ~0xff) == 0)
         {
@@ -5757,7 +5763,10 @@ else
   mask = ((1 << INTVAL (operands[1])) - 1) << INTVAL (operands[2]);
   operands[1] = GEN_INT (mask);
 
-  if (! REG_P (operands[0]) || QI_REG_P (operands[0]))
+  if (! REG_P (operands[0]) || QI_REG_P (operands[0])
+      /* A Pentium test is pairable only with eax. Not with ah or al.  */
+      && (! REG_P (operands[0]) || REGNO (operands[0]) || !TARGET_PENTIUM
+          || optimize_size))
     {
       if ((mask & ~0xff) == 0)
         {
@@ -5936,8 +5945,16 @@ else
        default:
          abort ();
        }
-      operands[3] = GEN_INT (c);
-      output_asm_insn (AS2 (testl,%3,%2), operands);
+      if (!TARGET_PENTIUM || optimize_size)
+        {
+          operands[3] = GEN_INT (c >> 8);
+          output_asm_insn (AS2 (test%B0,%3,%h2), operands);
+        }
+      else
+        {
+          operands[3] = GEN_INT (c);
+          output_asm_insn (AS2 (test%L0,%3,%2), operands);
+        }
       return eq ? AS1 (sete,%0) : AS1 (setne, %0);
     }
 
@@ -6113,8 +6130,16 @@ else
        default:
          abort ();
        }
-      operands[3] = GEN_INT (c);
-      output_asm_insn (AS2 (testl,%3,%2), operands);
+      if (!TARGET_PENTIUM || optimize_size)
+        {
+          operands[3] = GEN_INT (c >> 8);
+          output_asm_insn (AS2 (test%B0,%3,%h2), operands);
+        }
+      else
+        {
+          operands[3] = GEN_INT (c);
+          output_asm_insn (AS2 (test%L0,%3,%2), operands);
+        }
       return eq ? AS1 (je,%l1) : AS1 (jne, %l1);
     }
   if ((cc_status.flags & CC_NO_OVERFLOW) && (code == LE || code == GT))
@@ -6167,8 +6192,16 @@ else
        default:
          abort ();
        }
-      operands[3] = GEN_INT (c);
-      output_asm_insn (AS2 (testl,%3,%2), operands);
+      if (!TARGET_PENTIUM || optimize_size)
+        {
+          operands[3] = GEN_INT (c >> 8);
+          output_asm_insn (AS2 (test%B0,%3,%h2), operands);
+        }
+      else
+        {
+          operands[3] = GEN_INT (c);
+          output_asm_insn (AS2 (test%L0,%3,%2), operands);
+        }
       return eq ? AS1 (je,%l1) : AS1 (jne, %l1);
     }
   if ((cc_status.flags & CC_NO_OVERFLOW) && (code == LE || code == GT))