arch,cpu: Move endianness conversion of inst bytes into the ISA.

It doesn't matter if the bytes are converted before or after they're
fed into the decoder. The ISA already knows what endianness to use
implicitly, and this frees the CPU which doesn't from having to worry
about it.

Change-Id: Id6574ee81bbf4f032c1d7b2901a664f2bd014fbc
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22343
Maintainer: Gabe Black <gabeblack@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>

diff --git a/src/arch/alpha/decoder.hh b/src/arch/alpha/decoder.hh
index 522359c28598d67ca1fb8fa99d339e81a885e792..0ee425077fa240c871cb7eb490aed5ef4ed88723 100644 (file)
--- a/src/arch/alpha/decoder.hh
+++ b/src/arch/alpha/decoder.hh
@@ -66,7 +66,7 @@ class Decoder
     void
     moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
     {
-        ext_inst = inst;
+        ext_inst = letoh(inst);
         instDone = true;
         if (FullSystem)
             ext_inst |= (static_cast<ExtMachInst>(pc.pc() & 0x1) << 32);

diff --git a/src/arch/arm/decoder.cc b/src/arch/arm/decoder.cc
index 4c86ee2c695dcf621aaa27deb1df15f3c9f8c38f..a2c504334a0828b7bdf74f91dea562f495f31d56 100644 (file)
--- a/src/arch/arm/decoder.cc
+++ b/src/arch/arm/decoder.cc
@@ -154,7 +154,7 @@ Decoder::consumeBytes(int numBytes)
 void
 Decoder::moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
 {
-    data = inst;
+    data = letoh(inst);
     offset = (fetchPC >= pc.instAddr()) ? 0 : pc.instAddr() - fetchPC;
     emi.thumb = pc.thumb();
     emi.aarch64 = pc.aarch64();

diff --git a/src/arch/mips/decoder.hh b/src/arch/mips/decoder.hh
index 4a2fc46a5f14ed3deefe7254e734e9cad03f855c..825ab8adad8baae3b2ec1840df764c46bc4e9210 100644 (file)
--- a/src/arch/mips/decoder.hh
+++ b/src/arch/mips/decoder.hh
@@ -68,7 +68,7 @@ class Decoder
     void
     moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
     {
-        emi = inst;
+        emi = letoh(inst);
         instDone = true;
     }
 

diff --git a/src/arch/power/decoder.hh b/src/arch/power/decoder.hh
index cc086adc558be30fd6172a1fd2a53b6ce5ef0ba3..56273f8db20d50eb77149250c025781f98536465 100644 (file)
--- a/src/arch/power/decoder.hh
+++ b/src/arch/power/decoder.hh
@@ -67,7 +67,7 @@ class Decoder
     void
     moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
     {
-        emi = inst;
+        emi = betoh(inst);
         instDone = true;
     }
 

diff --git a/src/arch/riscv/decoder.cc b/src/arch/riscv/decoder.cc
index 41a52020eb3eef2406e806a9f9c672c0cba3b999..69c3921942991c3fa72b7cea444fd4f92ba2f42c 100644 (file)
--- a/src/arch/riscv/decoder.cc
+++ b/src/arch/riscv/decoder.cc
@@ -52,6 +52,7 @@ void Decoder::reset()
 void
 Decoder::moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
 {
+    inst = letoh(inst);
     DPRINTF(Decode, "Requesting bytes 0x%08x from address %#x\n", inst,
             fetchPC);
 

diff --git a/src/arch/sparc/decoder.hh b/src/arch/sparc/decoder.hh
index 6fa506f37a65d200fb92717c8018e3235295aeaa..8124a69634216d17e07fd71a5ba670a836f24e5a 100644 (file)
--- a/src/arch/sparc/decoder.hh
+++ b/src/arch/sparc/decoder.hh
@@ -65,7 +65,7 @@ class Decoder
     void
     moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
     {
-        emi = inst;
+        emi = betoh(inst);
         // The I bit, bit 13, is used to figure out where the ASI
         // should come from. Use that in the ExtMachInst. This is
         // slightly redundant, but it removes the need to put a condition

diff --git a/src/arch/x86/decoder.hh b/src/arch/x86/decoder.hh
index 412b7c73f6f20919ad1cb469c73e6e81ba3d3bbe..064fd3a80c8f6e13cf38ee6513a4e44d8b8ce3c6 100644 (file)
--- a/src/arch/x86/decoder.hh
+++ b/src/arch/x86/decoder.hh
@@ -310,7 +310,7 @@ class Decoder
         DPRINTF(Decoder, "Getting more bytes.\n");
         basePC = fetchPC;
         offset = (fetchPC >= pc.instAddr()) ? 0 : pc.instAddr() - fetchPC;
-        fetchChunk = data;
+        fetchChunk = letoh(data);
         outOfBytes = false;
         process();
     }

diff --git a/src/cpu/checker/cpu_impl.hh b/src/cpu/checker/cpu_impl.hh
index 9e4bdcd5296a06ce281e78f492ef50d22371bd09..fce4a9fc36bd7d6459aa5465dff0cfb3d0183ca4 100644 (file)
--- a/src/cpu/checker/cpu_impl.hh
+++ b/src/cpu/checker/cpu_impl.hh
@@ -285,7 +285,6 @@ Checker<Impl>::verify(const DynInstPtr &completed_inst)
 
                     pkt->dataStatic(&machInst);
                     icachePort->sendFunctional(pkt);
-                    machInst = gtoh(machInst);
 
                     delete pkt;
                 }

diff --git a/src/cpu/minor/fetch2.cc b/src/cpu/minor/fetch2.cc
index d60a1bab01ffcdd9b345bd558ab3d9a94177fa41..f047d6816fe84143c8e0269ac0a2fb8c6479a427 100644 (file)
--- a/src/cpu/minor/fetch2.cc
+++ b/src/cpu/minor/fetch2.cc
@@ -376,12 +376,10 @@ Fetch2::evaluate()
             } else {
                 uint8_t *line = line_in->line;
 
-                TheISA::MachInst inst_word;
                 /* The instruction is wholly in the line, can just
                  *  assign */
-                inst_word = TheISA::gtoh(
-                    *(reinterpret_cast<TheISA::MachInst *>
-                    (line + fetch_info.inputIndex)));
+                auto inst_word = *reinterpret_cast<TheISA::MachInst *>
+                                  (line + fetch_info.inputIndex);
 
                 if (!decoder->instReady()) {
                     decoder->moreBytes(fetch_info.pc,

diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 60542b8243a8e4b6d89f180636145a7780ed1003..47b1ad0c5aef4bb03557b772c483891dd5f01872 100644 (file)
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -1285,8 +1285,7 @@ DefaultFetch<Impl>::fetch(bool &status_change)
                 break;
             }
 
-            MachInst inst = TheISA::gtoh(cacheInsts[blkOffset]);
-            decoder[tid]->moreBytes(thisPC, fetchAddr, inst);
+            decoder[tid]->moreBytes(thisPC, fetchAddr, cacheInsts[blkOffset]);
 
             if (decoder[tid]->needMoreBytes()) {
                 blkOffset++;

diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 3000fae530b78b3adbff55d3e7b55c4e44802559..566533c73173e24964cd258c4d5a87d84baa88ad 100644 (file)
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -503,8 +503,6 @@ BaseSimpleCPU::preExecute()
     thread->comInstEventQueue.serviceEvents(t_info.numInst);
 
     // decode the instruction
-    inst = gtoh(inst);
-
     TheISA::PCState pcState = thread->pcState();
 
     if (isRomMicroPC(pcState.microPC())) {