i965/fs: Apply cube map array fixup and restore the payload.

So that we don't have partial writes to a large VGRF. Will be cleaned up
by register coalescing.

diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 4d58cc6ef59014914ca26181cbf8848e673613aa..6352739e794453edb790c02dd66c7c6b31bc5ea3 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -1739,7 +1739,20 @@ fs_visitor::visit(ir_texture *ir)
           type->sampler_array) {
          fs_reg depth = dst;
          depth.reg_offset = 2;
-         emit_math(SHADER_OPCODE_INT_QUOTIENT, depth, depth, fs_reg(6));
+         fs_reg fixed_depth = fs_reg(this, glsl_type::int_type);
+         emit_math(SHADER_OPCODE_INT_QUOTIENT, fixed_depth, depth, fs_reg(6));
+
+         fs_reg *fixed_payload = ralloc_array(mem_ctx, fs_reg, inst->regs_written);
+         fs_reg d = dst;
+         for (int i = 0; i < inst->regs_written; i++) {
+            if (i == 2) {
+               fixed_payload[i] = fixed_depth;
+            } else {
+               d.reg_offset = i;
+               fixed_payload[i] = d;
+            }
+         }
+         emit(LOAD_PAYLOAD(dst, fixed_payload, inst->regs_written));
       }
    }