dev,stats: Update stats style for CopyEngine and IdeDisk

Change-Id: Ib757b00864bc144b20adef974e3443ddba2945f0
Signed-off-by: Hoa Nguyen <hoanguyen@ucdavis.edu>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/36436
Reviewed-by: Gabe Black <gabe.black@gmail.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>

diff --git a/src/dev/pci/copy_engine.cc b/src/dev/pci/copy_engine.cc
index 5673e63ad021318fde3c6b0d8df3e802fef8b43b..02d3d8670cdd94594987d3f7c40b275181d34563 100644 (file)
--- a/src/dev/pci/copy_engine.cc
+++ b/src/dev/pci/copy_engine.cc
@@ -58,7 +58,8 @@
 using namespace CopyEngineReg;
 
 CopyEngine::CopyEngine(const Params &p)
-    : PciDevice(p)
+    : PciDevice(p),
+      copyEngineStats(this, p.ChanCnt)
 {
     // All Reg regs are initialized to 0 by default
     regs.chanCount = p.ChanCnt;
@@ -425,23 +426,20 @@ CopyEngine::CopyEngineChannel::channelWrite(Packet *pkt, Addr daddr, int size)
     }
 }
 
-void
-CopyEngine::regStats()
+CopyEngine::
+CopyEngineStats::CopyEngineStats(Stats::Group *parent,
+                                 const uint8_t &channel_count)
+    : Stats::Group(parent, "CopyEngine"),
+      ADD_STAT(bytesCopied, "Number of bytes copied by each engine"),
+      ADD_STAT(copiesProcessed, "Number of copies processed by each engine")
 {
-    PciDevice::regStats();
-
-    using namespace Stats;
     bytesCopied
-        .init(regs.chanCount)
-        .name(name() + ".bytes_copied")
-        .desc("Number of bytes copied by each engine")
-        .flags(total)
+        .init(channel_count)
+        .flags(Stats::total)
         ;
     copiesProcessed
-        .init(regs.chanCount)
-        .name(name() + ".copies_processed")
-        .desc("Number of copies processed by each engine")
-        .flags(total)
+        .init(channel_count)
+        .flags(Stats::total)
         ;
 }
 
@@ -521,8 +519,8 @@ CopyEngine::CopyEngineChannel::writeCopyBytes()
     cePort.dmaAction(MemCmd::WriteReq, ce->pciToDma(curDmaDesc->dest),
                      curDmaDesc->len, &writeCompleteEvent, copyBuffer, 0);
 
-    ce->bytesCopied[channelId] += curDmaDesc->len;
-    ce->copiesProcessed[channelId]++;
+    ce->copyEngineStats.bytesCopied[channelId] += curDmaDesc->len;
+    ce->copyEngineStats.copiesProcessed[channelId]++;
 }
 
 void

diff --git a/src/dev/pci/copy_engine.hh b/src/dev/pci/copy_engine.hh
index ec3c45304fc86ed1b9d12f5bc606989504e99881..17d0eb8f221bfa3fb5b7278d814262fb584997ea 100644 (file)
--- a/src/dev/pci/copy_engine.hh
+++ b/src/dev/pci/copy_engine.hh
@@ -139,8 +139,13 @@ class CopyEngine : public PciDevice
 
   private:
 
-    Stats::Vector bytesCopied;
-    Stats::Vector copiesProcessed;
+    struct CopyEngineStats : public Stats::Group
+    {
+        CopyEngineStats(Stats::Group *parent, const uint8_t& channel_count);
+
+        Stats::Vector bytesCopied;
+        Stats::Vector copiesProcessed;
+    } copyEngineStats;
 
     // device registers
     CopyEngineReg::Regs regs;
@@ -158,8 +163,6 @@ class CopyEngine : public PciDevice
     CopyEngine(const Params &params);
     ~CopyEngine();
 
-    void regStats() override;
-
     Port &getPort(const std::string &if_name,
             PortID idx = InvalidPortID) override;
 

diff --git a/src/dev/storage/ide_disk.cc b/src/dev/storage/ide_disk.cc
index 3f297754fc85f0bc5df3f9ce846e439e8b5e3728..808c70586386e7c64c548c0b964892762bcce637 100644 (file)
--- a/src/dev/storage/ide_disk.cc
+++ b/src/dev/storage/ide_disk.cc
@@ -60,6 +60,7 @@
 
 IdeDisk::IdeDisk(const Params &p)
     : SimObject(p), ctrl(NULL), image(p.image), diskDelay(p.delay),
+      ideDiskStats(this),
       dmaTransferEvent([this]{ doDmaTransfer(); }, name()),
       dmaReadCG(NULL),
       dmaReadWaitEvent([this]{ doDmaRead(); }, name()),
@@ -386,37 +387,18 @@ IdeDisk::doDmaDataRead()
     schedule(dmaReadWaitEvent, curTick() + totalDiskDelay);
 }
 
-void
-IdeDisk::regStats()
+IdeDisk::
+IdeDiskStats::IdeDiskStats(Stats::Group *parent)
+    : Stats::Group(parent, "IdeDisk"),
+      ADD_STAT(dmaReadFullPages,
+               "Number of full page size DMA reads (not PRD)."),
+      ADD_STAT(dmaReadBytes,
+               "Number of bytes transfered via DMA reads (not PRD)."),
+      ADD_STAT(dmaReadTxs, "Number of DMA read transactions (not PRD)."),
+      ADD_STAT(dmaWriteFullPages, "Number of full page size DMA writes."),
+      ADD_STAT(dmaWriteBytes, "Number of bytes transfered via DMA writes."),
+      ADD_STAT(dmaWriteTxs, "Number of DMA write transactions.")
 {
-    SimObject::regStats();
-
-    using namespace Stats;
-    dmaReadFullPages
-        .name(name() + ".dma_read_full_pages")
-        .desc("Number of full page size DMA reads (not PRD).")
-        ;
-    dmaReadBytes
-        .name(name() + ".dma_read_bytes")
-        .desc("Number of bytes transfered via DMA reads (not PRD).")
-        ;
-    dmaReadTxs
-        .name(name() + ".dma_read_txs")
-        .desc("Number of DMA read transactions (not PRD).")
-        ;
-
-    dmaWriteFullPages
-        .name(name() + ".dma_write_full_pages")
-        .desc("Number of full page size DMA writes.")
-        ;
-    dmaWriteBytes
-        .name(name() + ".dma_write_bytes")
-        .desc("Number of bytes transfered via DMA writes.")
-        ;
-    dmaWriteTxs
-        .name(name() + ".dma_write_txs")
-        .desc("Number of DMA write transactions.")
-        ;
 }
 
 void
@@ -445,10 +427,10 @@ IdeDisk::doDmaRead()
         assert(dmaReadCG->complete() < MAX_DMA_SIZE);
         ctrl->dmaRead(pciToDma(dmaReadCG->addr()), dmaReadCG->size(),
                 &dmaReadWaitEvent, dataBuffer + dmaReadCG->complete());
-        dmaReadBytes += dmaReadCG->size();
-        dmaReadTxs++;
+        ideDiskStats.dmaReadBytes += dmaReadCG->size();
+        ideDiskStats.dmaReadTxs++;
         if (dmaReadCG->size() == chunkBytes)
-            dmaReadFullPages++;
+            ideDiskStats.dmaReadFullPages++;
         dmaReadCG->next();
     } else {
         assert(dmaReadCG->done());
@@ -530,10 +512,10 @@ IdeDisk::doDmaWrite()
                 &dmaWriteWaitEvent, dataBuffer + dmaWriteCG->complete());
         DPRINTF(IdeDisk, "doDmaWrite: not done curPrd byte count %d, eot %#x\n",
                 curPrd.getByteCount(), curPrd.getEOT());
-        dmaWriteBytes += dmaWriteCG->size();
-        dmaWriteTxs++;
+        ideDiskStats.dmaWriteBytes += dmaWriteCG->size();
+        ideDiskStats.dmaWriteTxs++;
         if (dmaWriteCG->size() == chunkBytes)
-            dmaWriteFullPages++;
+            ideDiskStats.dmaWriteFullPages++;
         dmaWriteCG->next();
     } else {
         DPRINTF(IdeDisk, "doDmaWrite: done curPrd byte count %d, eot %#x\n",

diff --git a/src/dev/storage/ide_disk.hh b/src/dev/storage/ide_disk.hh
index ba2bad2a19d87c2837de4a71ca7a0016d9f15e5b..a0e02ce08321ac0a44835550602c308553edcb52 100644 (file)
--- a/src/dev/storage/ide_disk.hh
+++ b/src/dev/storage/ide_disk.hh
@@ -252,12 +252,17 @@ class IdeDisk : public SimObject
     /** DMA Aborted */
     bool dmaAborted;
 
-    Stats::Scalar dmaReadFullPages;
-    Stats::Scalar dmaReadBytes;
-    Stats::Scalar dmaReadTxs;
-    Stats::Scalar dmaWriteFullPages;
-    Stats::Scalar dmaWriteBytes;
-    Stats::Scalar dmaWriteTxs;
+    struct IdeDiskStats : public Stats::Group
+    {
+        IdeDiskStats(Stats::Group *parent);
+
+        Stats::Scalar dmaReadFullPages;
+        Stats::Scalar dmaReadBytes;
+        Stats::Scalar dmaReadTxs;
+        Stats::Scalar dmaWriteFullPages;
+        Stats::Scalar dmaWriteBytes;
+        Stats::Scalar dmaWriteTxs;
+    } ideDiskStats;
 
   public:
     typedef IdeDiskParams Params;
@@ -273,11 +278,6 @@ class IdeDisk : public SimObject
      */
     void reset(int id);
 
-    /**
-     * Register Statistics
-     */
-    void regStats() override;
-
     /**
      * Set the controller for this device
      * @param c The IDE controller