radv: limit the scissor bug workaround to Vega 10 and Raven

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 0faf8030b498bafb536f57ab6d6e4a84646ea2d9..b0bddd16b39208de03d2a30a8b3fbda9d1e39404 100644 (file)
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1118,7 +1118,12 @@ radv_emit_scissor(struct radv_cmd_buffer *cmd_buffer)
 {
        uint32_t count = cmd_buffer->state.dynamic.scissor.count;
 
-       if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) {
+       /* Vega10/Raven scissor bug workaround. This must be done before VPORT
+        * scissor registers are changed. There is also a more efficient but
+        * more involved alternative workaround.
+        */
+       if (cmd_buffer->device->physical_device->rad_info.family == CHIP_VEGA10 ||
+           cmd_buffer->device->physical_device->rad_info.family == CHIP_RAVEN) {
                cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_PS_PARTIAL_FLUSH;
                si_emit_cache_flush(cmd_buffer);
        }