* simops.c (OP_500): Fix displacement handling for sld.w.

        (OP_501): Similarly for sst.w.
More fixes exposed by tda testing.

diff --git a/sim/v850/ChangeLog b/sim/v850/ChangeLog
index 00e90a3e299d370c5279a48ceecb6551f4ecd60e..1325b2aefc8c31b11edc1fa56def75aad118c0f5 100644 (file)
--- a/sim/v850/ChangeLog
+++ b/sim/v850/ChangeLog
@@ -1,5 +1,8 @@
 Thu Oct 24 12:26:35 1996  Jeffrey A Law  (law@cygnus.com)
 
+       * simops.c (OP_500): Fix displacement handling for sld.w.
+       (OP_501): Similarly for sst.w.
+
        * simops.c (trace_input): Remove all references to SEXT7.
        (OP_300, OP_400, OP_500, OP_380, OP_480, OP_501): Displacement
        is zero extended for sst/sld instructions.

diff --git a/sim/v850/simops.c b/sim/v850/simops.c
index b26680ee4bca9aedbccc16bbf3998f582c4c1ffa..77102328f1d042a8dd1bb0439eb4312282c80f42 100644 (file)
--- a/sim/v850/simops.c
+++ b/sim/v850/simops.c
@@ -456,7 +456,7 @@ OP_500 ()
   trace_input ("sld.w", OP_LOAD16, 4);
   temp = OP[1];
   temp &= 0x7f;
-  op2 = temp << 2;
+  op2 = temp << 1;
   result = load_mem (State.regs[30] + op2, 4);
   State.regs[OP[0]] = result;
   trace_output (OP_LOAD16);
@@ -505,7 +505,7 @@ OP_501 ()
   op0 = State.regs[OP[0]];
   temp = OP[1];
   temp &= 0x7f;
-  op1 = temp << 2;
+  op1 = temp << 1;
   store_mem (State.regs[30] + op1, 4, op0);
   trace_output (OP_STORE16);
 }