(no commit message)
authorMANIKANDAN <MANIKANDAN@web>
Mon, 27 Sep 2021 05:59:10 +0000 (06:59 +0100)
committerIkiWiki <ikiwiki.info>
Mon, 27 Sep 2021 05:59:10 +0000 (06:59 +0100)
about_us.mdwn

index c74ced180bbb51f458ca3487a68dc27ced42a840..fbd1d24bd7168d6fce9f86b88205501fbf00d37a 100644 (file)
@@ -218,7 +218,7 @@ Alain's website: <http://phcomp.co.uk>
 
 ## [[Manikandan Nagarajan|Manik]]
 
-* Languages: Verilog HDL, C, Python & TCL
+* Languages: Verilog HDL, VHDL, C, Python & TCL
 * Experience : Domain Specific Architecture Design and Implementation, IP Core Development, System on Chip, FPGA System Design, Chip Tapeout, Crypto Chip Design, Authentication Protocol Design. 
 * LinkedIn Profile: [[https://www.linkedin.com/in/manikandan-nagarajan-2156171a0/]]
 * Availability: 8~10hrs/week