i965/vec4: Port untyped atomic message support to Broadwell.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77221
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index 3bfe8e4d834258127c7f3cef9fea3ffca333055c..a86972a8d452654ecb417b2d06ac7b0bedffb935 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -783,6 +783,10 @@ private:
                                     struct brw_reg dst,
                                     struct brw_reg index,
                                     struct brw_reg offset);
+   void generate_untyped_atomic(vec4_instruction *ir,
+                                struct brw_reg dst,
+                                struct brw_reg atomic_op,
+                                struct brw_reg surf_index);
    void generate_untyped_surface_read(vec4_instruction *ir,
                                       struct brw_reg dst,
                                       struct brw_reg surf_index);

diff --git a/src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp b/src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp
index 1c4823d9254cd51c71e92407274b8552301a989c..1d833120d7720fe17d9731a53e910ead02b45c8b 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp
@@ -455,6 +455,39 @@ gen8_vec4_generator::generate_pull_constant_load(vec4_instruction *inst,
    brw_mark_surface_used(&prog_data->base, surf_index);
 }
 
+void
+gen8_vec4_generator::generate_untyped_atomic(vec4_instruction *ir,
+                                             struct brw_reg dst,
+                                             struct brw_reg atomic_op,
+                                             struct brw_reg surf_index)
+{
+   assert(atomic_op.file == BRW_IMMEDIATE_VALUE &&
+          atomic_op.type == BRW_REGISTER_TYPE_UD &&
+          surf_index.file == BRW_IMMEDIATE_VALUE &&
+          surf_index.type == BRW_REGISTER_TYPE_UD);
+   assert((atomic_op.dw1.ud & ~0xf) == 0);
+
+   unsigned msg_control =
+      atomic_op.dw1.ud | /* Atomic Operation Type: BRW_AOP_* */
+      (1 << 5); /* Return data expected */
+
+   gen8_instruction *inst = next_inst(BRW_OPCODE_SEND);
+   gen8_set_dst(brw, inst, retype(dst, BRW_REGISTER_TYPE_UD));
+   gen8_set_src0(brw, inst, brw_message_reg(ir->base_mrf));
+   gen8_set_dp_message(brw, inst, HSW_SFID_DATAPORT_DATA_CACHE_1,
+                       surf_index.dw1.ud,
+                       HSW_DATAPORT_DC_PORT1_UNTYPED_ATOMIC_OP_SIMD4X2,
+                       msg_control,
+                       ir->mlen,
+                       1,
+                       ir->header_present,
+                       false);
+
+   brw_mark_surface_used(&prog_data->base, surf_index.dw1.ud);
+}
+
+
+
 void
 gen8_vec4_generator::generate_untyped_surface_read(vec4_instruction *ir,
                                                    struct brw_reg dst,
@@ -785,7 +818,7 @@ gen8_vec4_generator::generate_vec4_instruction(vec4_instruction *instruction,
       break;
 
    case SHADER_OPCODE_UNTYPED_ATOMIC:
-      assert(!"XXX: Missing Gen8 vec4 support for UNTYPED_ATOMIC");
+      generate_untyped_atomic(ir, dst, src[0], src[1]);
       break;
 
    case SHADER_OPCODE_UNTYPED_SURFACE_READ: