r600g: don't use r600_context_reg on r6xx-r7xx

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/src/gallium/drivers/r600/r600.h b/src/gallium/drivers/r600/r600.h
index c3de51f8373eafbe335de267bc4ea3ce6f79e1a4..515d122ce3555c10f49b7f7a7ffa6fce3ba3f4d9 100644 (file)
--- a/src/gallium/drivers/r600/r600.h
+++ b/src/gallium/drivers/r600/r600.h
@@ -257,6 +257,7 @@ struct r600_draw {
        u32                     vgt_draw_initiator;
        u32                     indices_bo_offset;
        unsigned                db_render_override;
+       unsigned                db_render_control;
        struct r600_resource    *indices;
 };
 

diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c
index 7941ee2fba4b2d64333de471b4f39d9b653192f7..5026b800e9a5aabb7638b9edccc022470b355832 100644 (file)
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -1452,24 +1452,15 @@ void r600_context_draw(struct r600_context *ctx, const struct r600_draw *draw)
        if (draw->indices) {
                ndwords = 11;
        }
-       /* when increasing ndwords, bump the max limit too */
-       assert(ndwords <= R600_MAX_DRAW_CS_DWORDS);
-
-       /* queries need some special values
-        * (this is non-zero if any query is active) */
        if (ctx->num_cs_dw_queries_suspend) {
-               if (ctx->screen->family >= CHIP_RV770) {
-                       r600_context_reg(ctx,
-                                       R_028D0C_DB_RENDER_CONTROL,
-                                       S_028D0C_R700_PERFECT_ZPASS_COUNTS(1),
-                                       S_028D0C_R700_PERFECT_ZPASS_COUNTS(1));
-               }
-               r600_context_reg(ctx,
-                               R_028D10_DB_RENDER_OVERRIDE,
-                               S_028D10_NOOP_CULL_DISABLE(1),
-                               S_028D10_NOOP_CULL_DISABLE(1));
+               if (ctx->screen->family >= CHIP_RV770)
+                       ndwords += 3;
+               ndwords += 3;
        }
 
+       /* when increasing ndwords, bump the max limit too */
+       assert(ndwords <= R600_MAX_DRAW_CS_DWORDS);
+
        r600_need_cs_space(ctx, 0, TRUE);
        assert(ctx->pm4_cdwords + ctx->pm4_dirty_cdwords + ndwords < RADEON_MAX_CMDBUF_DWORDS);
 
@@ -1488,6 +1479,25 @@ void r600_context_draw(struct r600_context *ctx, const struct r600_draw *draw)
                ctx->streamout_start = FALSE;
        }
 
+       /* queries need some special values
+        * (this is non-zero if any query is active) */
+       if (ctx->num_cs_dw_queries_suspend) {
+               if (ctx->screen->family >= CHIP_RV770) {
+                       pm4 = &ctx->pm4[ctx->pm4_cdwords];
+                       pm4[0] = PKT3(PKT3_SET_CONTEXT_REG, 1, 0);
+                       pm4[1] = (R_028D0C_DB_RENDER_CONTROL - R600_CONTEXT_REG_OFFSET) >> 2;
+                       pm4[2] = draw->db_render_control | S_028D0C_R700_PERFECT_ZPASS_COUNTS(1);
+                       ctx->pm4_cdwords += 3;
+                       ndwords -= 3;
+               }
+               pm4 = &ctx->pm4[ctx->pm4_cdwords];
+               pm4[0] = PKT3(PKT3_SET_CONTEXT_REG, 1, 0);
+               pm4[1] = (R_028D10_DB_RENDER_OVERRIDE - R600_CONTEXT_REG_OFFSET) >> 2;
+               pm4[2] = draw->db_render_override | S_028D10_NOOP_CULL_DISABLE(1);
+               ctx->pm4_cdwords += 3;
+               ndwords -= 3;
+       }
+
        /* draw packet */
        pm4 = &ctx->pm4[ctx->pm4_cdwords];
 

diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
index 0c6d72dc72f99da33c7fb7ccf8642d78bf4116c2..4ba4b1bdad15e1538628936e81dee6ae1ba7c9f5 100644 (file)
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -126,6 +126,7 @@ struct r600_pipe_dsa {
        struct r600_pipe_state          rstate;
        unsigned                        alpha_ref;
        unsigned                        db_render_override;
+       unsigned                        db_render_control;
        ubyte                           valuemask[2];
        ubyte                           writemask[2];
 };

diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 58ec0593f1f379fe2dc8c6802987330b469e7d74..42ed14abd23bc5282cc4f7b7a1016f0dfa6b698f 100644 (file)
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -919,6 +919,9 @@ static void *r600_create_dsa_state(struct pipe_context *ctx,
        r600_pipe_state_add_reg(rstate, R_028D30_DB_PRELOAD_CONTROL, 0x00000000, NULL, 0);
        r600_pipe_state_add_reg(rstate, R_028D44_DB_ALPHA_TO_MASK, 0x0000AA00, NULL, 0);
 
+       dsa->db_render_override = db_render_override;
+       dsa->db_render_control = db_render_control;
+
        return rstate;
 }
 
@@ -2251,6 +2254,8 @@ void *r600_create_db_flush_dsa(struct r600_pipe_context *rctx)
 {
        struct pipe_depth_stencil_alpha_state dsa;
        struct r600_pipe_state *rstate;
+       struct r600_pipe_dsa *dsa_state;
+       unsigned db_render_control;
        boolean quirk = false;
 
        if (rctx->family == CHIP_RV610 || rctx->family == CHIP_RV630 ||
@@ -2270,12 +2275,17 @@ void *r600_create_db_flush_dsa(struct r600_pipe_context *rctx)
        }
 
        rstate = rctx->context.create_depth_stencil_alpha_state(&rctx->context, &dsa);
-       r600_pipe_state_add_reg(rstate,
-                               R_028D0C_DB_RENDER_CONTROL,
-                               S_028D0C_DEPTH_COPY_ENABLE(1) |
-                               S_028D0C_STENCIL_COPY_ENABLE(1) |
-                               S_028D0C_COPY_CENTROID(1),
-                               NULL, 0);
+       dsa_state = (struct r600_pipe_dsa*)rstate;
+
+       db_render_control =
+               S_028D0C_DEPTH_COPY_ENABLE(1) |
+               S_028D0C_STENCIL_COPY_ENABLE(1) |
+               S_028D0C_COPY_CENTROID(1);
+
+       r600_pipe_state_add_reg(rstate, R_028D0C_DB_RENDER_CONTROL, db_render_control, NULL, 0);
+
+       dsa_state->db_render_control = db_render_control;
+
        return rstate;
 }
 

diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index 501d369feb7b0a8a025c15cdb597cda957ec6165..5b54a00306e9f654462b4e98f860ea12ba1e5cd9 100644 (file)
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -665,6 +665,7 @@ static void r600_update_derived_state(struct r600_pipe_context *rctx)
 void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo)
 {
        struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
+       struct r600_pipe_dsa *dsa = (struct r600_pipe_dsa*)rctx->states[R600_PIPE_STATE_DSA];
        struct pipe_draw_info info = *dinfo;
        struct r600_draw rdraw = {};
        struct pipe_index_buffer ib = {};
@@ -780,9 +781,10 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo)
 
        r600_context_pipe_state_set(&rctx->ctx, &rctx->vgt);
 
+       rdraw.db_render_override = dsa->db_render_override;
+       rdraw.db_render_control = dsa->db_render_control;
+
        if (rctx->chip_class >= EVERGREEN) {
-               struct r600_pipe_dsa *dsa = (struct r600_pipe_dsa*)rctx->states[R600_PIPE_STATE_DSA];
-               rdraw.db_render_override = dsa->db_render_override;
                evergreen_context_draw(&rctx->ctx, &rdraw);
        } else {
                r600_context_draw(&rctx->ctx, &rdraw);