testsuite/
* g++.old-deja/g++.jason/thunk3.C: Remove SH5 checks.
* gcc.dg/
20021029-1.c: Likewise.
* gcc.target/sh/attr-isr-trap_exit.c: Likewise.
* gcc.target/sh/attr-isr-trapa.c: Likewise.
* gcc.target/sh/cmpstr.c: Likewise.
* gcc.target/sh/cmpstrn.c: Likewise.
* gcc.target/sh/memset.c: Likewise.
* gcc.target/sh/pr21255-2-mb.c: Likewise.
* gcc.target/sh/pr21255-2-ml.c: Likewise.
* gcc.target/sh/pr39423-1.c: Likewise.
* gcc.target/sh/pr49468-di.c: Likewise.
* gcc.target/sh/pr49468-si.c: Likewise.
* gcc.target/sh/pr49880-1.c: Likewise.
* gcc.target/sh/pr49880-2.c: Likewise.
* gcc.target/sh/pr49880-3.c: Likewise.
* gcc.target/sh/pr50751-1.c: Likewise.
* gcc.target/sh/pr50751-4.c: Likewise.
* gcc.target/sh/pr50751-7.c: Likewise.
* gcc.target/sh/pr51244-1.c: Likewise.
* gcc.target/sh/pr51244-10.c: Likewise.
* gcc.target/sh/pr51244-11.c: Likewise.
* gcc.target/sh/pr51244-12.c: Likewise.
* gcc.target/sh/pr51244-13.c: Likewise.
* gcc.target/sh/pr51244-14.c: Likewise.
* gcc.target/sh/pr51244-17.c: Likewise.
* gcc.target/sh/pr51244-18.c: Likewise.
* gcc.target/sh/pr51244-19.c: Likewise.
* gcc.target/sh/pr51244-4.c: Likewise.
* gcc.target/sh/pr51244-5.c: Likewise.
* gcc.target/sh/pr51244-7.c: Likewise.
* gcc.target/sh/pr51244-8.c: Likewise.
* gcc.target/sh/pr51244-9.c: Likewise.
* gcc.target/sh/pr51697.c: Likewise.
* gcc.target/sh/pr52483-1.c: Likewise.
* gcc.target/sh/pr52483-2.c: Likewise.
* gcc.target/sh/pr52483-3.c: Likewise.
* gcc.target/sh/pr52483-5.c: Likewise.
* gcc.target/sh/pr52933-1.c: Likewise.
* gcc.target/sh/pr52933-2.c: Likewise.
* gcc.target/sh/pr52933-3.c: Likewise.
* gcc.target/sh/pr53568-1.c: Likewise.
* gcc.target/sh/pr53976-1.c: Likewise.
* gcc.target/sh/pr53988-1.c: Likewise.
* gcc.target/sh/pr53988.c: Likewise.
* gcc.target/sh/pr54089-1.c: Likewise.
* gcc.target/sh/pr54089-6.c: Likewise.
* gcc.target/sh/pr54089-7.c: Likewise.
* gcc.target/sh/pr54089-8.c: Likewise.
* gcc.target/sh/pr54089-9.c: Likewise.
* gcc.target/sh/pr54236-1.c: Likewise.
* gcc.target/sh/pr54236-2.c: Likewise.
* gcc.target/sh/pr54236-3.c: Likewise.
* gcc.target/sh/pr54236-4.c: Likewise.
* gcc.target/sh/pr54386.c: Likewise.
* gcc.target/sh/pr54602-1.c: Likewise.
* gcc.target/sh/pr54685.c: Likewise.
* gcc.target/sh/pr54760-1.c: Likewise.
* gcc.target/sh/pr54760-2.c: Likewise.
* gcc.target/sh/pr54760-3.c: Likewise.
* gcc.target/sh/pr54760-4.c: Likewise.
* gcc.target/sh/pr54760-5.c: Likewise.
* gcc.target/sh/pr54760-6.c: Likewise.
* gcc.target/sh/pr55146.c: Likewise.
* gcc.target/sh/pr55160.c: Likewise.
* gcc.target/sh/pr59278.c: Likewise.
* gcc.target/sh/pr59401-1.c: Likewise.
* gcc.target/sh/pr59533-1.c: Likewise.
* gcc.target/sh/pr63260.c: Likewise.
* gcc.target/sh/pragma-isr-trap-exit.c: Likewise.
* gcc.target/sh/pragma-isr-trapa.c: Likewise.
* gcc.target/sh/strlen.c: Likewise.
* gcc.target/sh/torture/pr30807.c: Likewise.
* gcc.target/sh/torture/pr34777.c: Likewise.
* gcc.target/sh/torture/pr64652.c: Likewise.
* gcc.target/sh/torture/pr65505.c: Likewise.
* gcc.target/sh/torture/pragma-isr.c: Likewise.
* gcc.target/sh/torture/pragma-isr2.c: Likewise.
From-SVN: r235673
+2016-04-30 Oleg Endo <olegendo@gcc.gnu.org>
+
+ * g++.old-deja/g++.jason/thunk3.C: Remove SH5 checks.
+ * gcc.dg/20021029-1.c: Likewise.
+ * gcc.target/sh/attr-isr-trap_exit.c: Likewise.
+ * gcc.target/sh/attr-isr-trapa.c: Likewise.
+ * gcc.target/sh/cmpstr.c: Likewise.
+ * gcc.target/sh/cmpstrn.c: Likewise.
+ * gcc.target/sh/memset.c: Likewise.
+ * gcc.target/sh/pr21255-2-mb.c: Likewise.
+ * gcc.target/sh/pr21255-2-ml.c: Likewise.
+ * gcc.target/sh/pr39423-1.c: Likewise.
+ * gcc.target/sh/pr49468-di.c: Likewise.
+ * gcc.target/sh/pr49468-si.c: Likewise.
+ * gcc.target/sh/pr49880-1.c: Likewise.
+ * gcc.target/sh/pr49880-2.c: Likewise.
+ * gcc.target/sh/pr49880-3.c: Likewise.
+ * gcc.target/sh/pr50751-1.c: Likewise.
+ * gcc.target/sh/pr50751-4.c: Likewise.
+ * gcc.target/sh/pr50751-7.c: Likewise.
+ * gcc.target/sh/pr51244-1.c: Likewise.
+ * gcc.target/sh/pr51244-10.c: Likewise.
+ * gcc.target/sh/pr51244-11.c: Likewise.
+ * gcc.target/sh/pr51244-12.c: Likewise.
+ * gcc.target/sh/pr51244-13.c: Likewise.
+ * gcc.target/sh/pr51244-14.c: Likewise.
+ * gcc.target/sh/pr51244-17.c: Likewise.
+ * gcc.target/sh/pr51244-18.c: Likewise.
+ * gcc.target/sh/pr51244-19.c: Likewise.
+ * gcc.target/sh/pr51244-4.c: Likewise.
+ * gcc.target/sh/pr51244-5.c: Likewise.
+ * gcc.target/sh/pr51244-7.c: Likewise.
+ * gcc.target/sh/pr51244-8.c: Likewise.
+ * gcc.target/sh/pr51244-9.c: Likewise.
+ * gcc.target/sh/pr51697.c: Likewise.
+ * gcc.target/sh/pr52483-1.c: Likewise.
+ * gcc.target/sh/pr52483-2.c: Likewise.
+ * gcc.target/sh/pr52483-3.c: Likewise.
+ * gcc.target/sh/pr52483-5.c: Likewise.
+ * gcc.target/sh/pr52933-1.c: Likewise.
+ * gcc.target/sh/pr52933-2.c: Likewise.
+ * gcc.target/sh/pr52933-3.c: Likewise.
+ * gcc.target/sh/pr53568-1.c: Likewise.
+ * gcc.target/sh/pr53976-1.c: Likewise.
+ * gcc.target/sh/pr53988-1.c: Likewise.
+ * gcc.target/sh/pr53988.c: Likewise.
+ * gcc.target/sh/pr54089-1.c: Likewise.
+ * gcc.target/sh/pr54089-6.c: Likewise.
+ * gcc.target/sh/pr54089-7.c: Likewise.
+ * gcc.target/sh/pr54089-8.c: Likewise.
+ * gcc.target/sh/pr54089-9.c: Likewise.
+ * gcc.target/sh/pr54236-1.c: Likewise.
+ * gcc.target/sh/pr54236-2.c: Likewise.
+ * gcc.target/sh/pr54236-3.c: Likewise.
+ * gcc.target/sh/pr54236-4.c: Likewise.
+ * gcc.target/sh/pr54386.c: Likewise.
+ * gcc.target/sh/pr54602-1.c: Likewise.
+ * gcc.target/sh/pr54685.c: Likewise.
+ * gcc.target/sh/pr54760-1.c: Likewise.
+ * gcc.target/sh/pr54760-2.c: Likewise.
+ * gcc.target/sh/pr54760-3.c: Likewise.
+ * gcc.target/sh/pr54760-4.c: Likewise.
+ * gcc.target/sh/pr54760-5.c: Likewise.
+ * gcc.target/sh/pr54760-6.c: Likewise.
+ * gcc.target/sh/pr55146.c: Likewise.
+ * gcc.target/sh/pr55160.c: Likewise.
+ * gcc.target/sh/pr59278.c: Likewise.
+ * gcc.target/sh/pr59401-1.c: Likewise.
+ * gcc.target/sh/pr59533-1.c: Likewise.
+ * gcc.target/sh/pr63260.c: Likewise.
+ * gcc.target/sh/pragma-isr-trap-exit.c: Likewise.
+ * gcc.target/sh/pragma-isr-trapa.c: Likewise.
+ * gcc.target/sh/strlen.c: Likewise.
+ * gcc.target/sh/torture/pr30807.c: Likewise.
+ * gcc.target/sh/torture/pr34777.c: Likewise.
+ * gcc.target/sh/torture/pr64652.c: Likewise.
+ * gcc.target/sh/torture/pr65505.c: Likewise.
+ * gcc.target/sh/torture/pragma-isr.c: Likewise.
+ * gcc.target/sh/torture/pragma-isr2.c: Likewise.
+
2016-04-29 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/66644
// { dg-do run }
-// { dg-skip-if "fails with generic thunk support" { rs6000-*-* powerpc-*-eabi v850-*-* sh-*-* sh64-*-* h8*-*-* xtensa*-*-* m32r*-*-* lm32-*-* nios2-*-* } { "*" } { "" } }
+// { dg-skip-if "fails with generic thunk support" { rs6000-*-* powerpc-*-eabi v850-*-* sh-*-* h8*-*-* xtensa*-*-* m32r*-*-* lm32-*-* nios2-*-* } { "*" } { "" } }
// Test that variadic function calls using thunks work right.
// Note that this will break on any target that uses the generic thunk
// support, because it doesn't support variadic functions.
variables into writable sections. */
/* { dg-do compile { target fpic } } */
/* { dg-options "-O2 -fpic" } */
-/* { dg-options "-O2 -fpic -mpt-fixed" { target sh64*-*-* } } */
/* { dg-final { scan-assembler-not ".data.rel.ro.local" } } */
/* { dg-require-effective-target label_values } */
/* { dg-require-effective-target indirect_jumps } */
/* Check that trapa / interrput_handler attributes can paired in
either order. */
/* { dg-do compile } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-options "-O" } */
/* { dg-final { scan-assembler "trapa\[ \t\]\[ \t\]*#4"} } */
/* { dg-final { scan-assembler-times "trapa" 1 } } */
/* Check that no interrupt-specific register saves are generated. */
/* { dg-do compile { target { { "sh*-*-*" } && nonpic } } } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-options "-O" } */
/* { dg-final { scan-assembler-times "rte" 1 } } */
/* { dg-final { scan-assembler-not "mov.l\tr\[0-9\],@-r15" } } */
when optimizing for speed. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-final { scan-assembler-not "jmp" } } */
/* { dg-final { scan-assembler-times "cmp/str" 3 } } */
/* { dg-final { scan-assembler-times "tst\t#3" 2 } } */
when optimizing for speed. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-final { scan-assembler-not "jmp" } } */
/* { dg-final { scan-assembler-times "cmp/str" 1 } } */
optimizing for speed. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-final { scan-assembler-not "jmp" } } */
void
-/* { dg-do compile } */
-/* { dg-options "-mb -O2 -fomit-frame-pointer" } */
+/* { dg-do compile { target { big_endian } } } */
+/* { dg-options "-O2 -fomit-frame-pointer" } */
/* { dg-final { scan-assembler "mov @r.,r.; mov @\\(4,r.\\),r." } } */
double d;
/* If -ml from the target options is passed after -mb from dg-options, we
end up with th reverse endianness. */
-#if TARGET_SHMEDIA || defined (__LITTLE_ENDIAN__)
- asm ("mov @r1,r3; mov @(4,r1),r4");
-#else
asm ("mov %S1,%S0; mov %R1,%R0" : "=&r" (r) : "m" (d));
-#endif
return r;
}
-/* { dg-do compile } */
+/* { dg-do compile { target { little_endian } } } */
/* { dg-options "-O2 -fomit-frame-pointer" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-mb" && "-m5*"} { "" } } */
/* { dg-final { scan-assembler "mov @\\(4,r.\\),r.; mov @r.,r." } } */
double d;
small offset, instead of re-calculating the index. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-not "add\t#1" } } */
int
and conditional branch instead of default branch-free code. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-times "negc" 4 } } */
conditional branch instead of default branch-free code. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-times "neg" 2 } } */
/* Check that the option -mdiv=call-div1 works. */
/* { dg-do link } */
/* { dg-options "-mdiv=call-div1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
int
test00 (int a, int b)
/* Check that the option -mdiv=call-fp works. */
/* { dg-do link } */
/* { dg-options "-mdiv=call-fp" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
int
test00 (int a, int b)
/* Check that the option -mdiv=call-table works. */
/* { dg-do link } */
/* { dg-options "-mdiv=call-table" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
int
test00 (int a, int b)
calculations outside the mov insns. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-not "add|sub" } } */
void
calculations outside the mov insns. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-not "add|sub" } } */
void
outside the mov insns. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-not "add|sub" } } */
typedef struct
test instructions. */
/* { dg-do compile } */
/* { dg-options "-O1 -mbranch-cost=2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-not "movt|tst|negc|extu" } } */
int
*/
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-final { scan-assembler-not "shll|subc|and" } } */
int
test_00 (int* p)
execution patterns. */
/* { dg-do compile } */
/* { dg-options "-O1 -mzdcbranch" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-final { scan-assembler-not "subc|and" } } */
int*
which handles the inverted case does not work properly. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-final { scan-assembler-times "negc" 15 { target { ! sh2a } } } } */
/* { dg-final { scan-assembler-times "addc" 3 { target { ! sh2a } } } } */
insns. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-final { scan-assembler-times "tst" 2 } } */
void printk (const char*, const char*, int);
patterns, we only check for the extu. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-final { scan-assembler-not "extu" } } */
typedef struct transaction_s transaction_t;
results of arithmetic with T bit inputs. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-final { scan-assembler-not "extu|exts" } } */
int
reload. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-final { scan-assembler-not "movt|tst" } } */
typedef char Char;
reload. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-final { scan-assembler-not "movt" } } */
struct request
uses the subc instruction. */
/* { dg-do compile } */
/* { dg-options "-O1 -mbranch-cost=2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-not "movt|tst|negc|movrt" } } */
/* { dg-final { scan-assembler-times "subc" 3 } } */
/* { dg-final { scan-assembler-times "not\t" 1 } } */
a negc or movrt insn that stores the inverted T bit in a reg. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-final { scan-assembler-not "extu|exts" } } */
int
*/
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-final { scan-assembler-not "cmp/hi" } } */
/* { dg-final { scan-assembler-not "mov\t#0" } } */
*/
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-final { scan-assembler-not "shad|neg" } } */
int test_01_00 (int*, void*);
*/
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-final { scan-assembler-not "mov\t#0" } } */
static inline unsigned int
test_03_00 (unsigned int x)
with -Os. */
/* { dg-do compile } */
/* { dg-options "-Os" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-times "tst" 2 } } */
/* { dg-final { scan-assembler-not "cmp" } } */
sign/zero extensions. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-not "exts|extu" } } */
int
addressing modes and do not result in redundant sign/zero extensions. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-times "@\\(5," 4 } } */
/* { dg-final { scan-assembler-times "@\\(10," 4 } } */
/* { dg-final { scan-assembler-times "@\\(20," 4 } } */
modes and do not result in redundant sign/zero extensions. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-times "@\\(r0," 6 } } */
/* { dg-final { scan-assembler-not "exts|extu" } } */
modes and do not result in redundant sign extensions. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-times "@r\[0-9\]\+\\+," 3 } } */
/* { dg-final { scan-assembler-not "exts" } } */
logic usually show up as redundant tst insns. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-final { scan-assembler-times "div0s" 32 } } */
/* { dg-final { scan-assembler-not "tst" } } */
/* { dg-final { scan-assembler-not "not\t" } } */
logic usually show up as redundant tst insns. */
/* { dg-do compile } */
/* { dg-options "-O2 -mpretend-cmove" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-final { scan-assembler-times "div0s" 32 } } */
/* { dg-final { scan-assembler-not "tst" } } */
/* { dg-final { scan-assembler-not "not\t" } } */
/* Check that the div0s instruction is used for integer sign comparisons. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-final { scan-assembler-times "div0s" 2 } } */
typedef struct { unsigned int arg[100]; } *FunctionCallInfo;
instructions. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-times "swap.w" 7 } } */
/* { dg-final { scan-assembler-times "swap.b" 16 } } */
/* { dg-final { scan-assembler-times "extu.w" 2 } } */
works as expected. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-final { scan-assembler-times "clrt" 2 } } */
/* { dg-final { scan-assembler-times "sett" 1 } } */
tst Rm,Rn instruction is used. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-times "tst\tr" 8 } } */
/* { dg-final { scan-assembler-times "mov.b" 4 } } */
/* { dg-final { scan-assembler-times "mov.w" 4 } } */
movu insn. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-times "tst\tr" 8 } } */
/* { dg-final { scan-assembler-not "tst\t#255" } } */
/* { dg-final { scan-assembler-not "exts|extu|and|movu" } } */
/* Check that the rotcr instruction is generated. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-times "rotcr" 24 } } */
/* { dg-final { scan-assembler-times "shll\t" 1 } } */
/* { dg-final { scan-assembler-not "and\t#1" } } */
/* Check that the rotr and rotl instructions are generated. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-final { scan-assembler-times "rotr" 2 } } */
/* { dg-final { scan-assembler-times "rotl" 3 } } */
/* Check that the rotcr instruction is generated. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-times "rotcr" 4 } } */
/* { dg-final { scan-assembler-not "movt" } } */
/* { dg-final { scan-assembler-not "or\t" } } */
/* Check that the rotcl instruction is generated. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-times "rotcl" 28 } } */
typedef char bool;
/* Check that the rotcr instruction is generated. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-times "rotcl" 4 } } */
/* { dg-final { scan-assembler-not "movt" } } */
/* { dg-final { scan-assembler-not "or\t" } } */
movt instructions in these cases. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
+
/* { dg-final { scan-assembler-times "addc" 6 } } */
/* { dg-final { scan-assembler-times "subc" 4 } } */
/* { dg-final { scan-assembler-times "sett" 5 } } */
these cases. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
+
/* { dg-final { scan-assembler-times "addc" 36 } } */
/* { dg-final { scan-assembler-times "shll" 14 } } */
/* { dg-final { scan-assembler-times "add\tr" 12 } } */
these cases. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-times "addc" 4 } } */
/* { dg-final { scan-assembler-times "subc" 5 } } */
/* { dg-final { scan-assembler-times "movt" 1 } } */
inverted. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
+
/* { dg-final { scan-assembler-times "cmp/eq" 7 } } */
/* { dg-final { scan-assembler-times "subc" 5 { target { ! sh2a } } } } */
/* Check that the inlined mem load is not handled as unaligned load. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-not "shll|extu|or" } } */
static inline int
expected we won't see any nop insns. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-not "nop" } } */
int test00 (int a, int b);
utilizing the cmp/pz instruction. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-not "not\[ \t\]" } } */
/* { dg-final { scan-assembler-times "cmp/pz" 7 } } */
/* { dg-final { scan-assembler-times "shll" 1 } } */
built-in functions result in gbr store / load instructions. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-times "ldc" 1 } } */
/* { dg-final { scan-assembler-times "stc" 1 } } */
/* { dg-final { scan-assembler-times "gbr" 2 } } */
instruction something is not working properly. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-times "stc\tgbr" 0 } } */
/* ---------------------------------------------------------------------------
independent thread_pointer built-in functions available. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
int
test00 (void* p, int x)
register, i.e. it is invalidated by function calls. */
/* { dg-do compile } */
/* { dg-options "-O1 -fcall-used-gbr" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler "stc\tgbr" } } */
extern int test00 (void);
call saved register. */
/* { dg-do compile } */
/* { dg-options "-O1 -fcall-saved-gbr" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-not "stc\tgbr" } } */
typedef struct
are. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-not "stc\tgbr" } } */
typedef struct
/* Check that the 'extu.b' instruction is generated for short jump tables. */
/* { dg-do compile } */
/* { dg-options "-Os" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler "extu.b" } } */
int
/* Check that the decrement-and-test instruction is generated. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-times "dt\tr" 2 } } */
int
/* Check that combine considers unused regs dead. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler "addc" } } */
struct result
and a GBR memory access must not be done. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler "stc\tgbr" } } */
/* { dg-final { scan-assembler "bf|bt" } } */
/* Check that the cmp/pz instruction is generated as expected. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-times "shll" 1 } } */
/* { dg-final { scan-assembler-times "movt" 5 } } */
fabs instructions. */
/* { dg-do compile } */
/* { dg-options "-O1" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*"} { "" } } */
/* { dg-final { scan-assembler-not "fpscr|fpchg" } } */
float
/* Check whether trapa is generated only for an ISR. */
/* { dg-do compile } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-options "-O" } */
/* { dg-final { scan-assembler-times "trapa\[ \t\]\[ \t\]*#4" 1 } } */
/* Check that no interrupt-specific register saves are generated. */
/* { dg-do compile { target { { "sh*-*-*" } && nonpic } } } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-options "-O" } */
/* { dg-final { scan-assembler-times "rte" 1 } } */
/* { dg-final { scan-assembler-not "mov.l\tr\[0-9\],@-r15" } } */
when optimizing for speed. */
/* { dg-do compile } */
/* { dg-options "-O2" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-final { scan-assembler-not "jmp" } } */
/* { dg-final { scan-assembler-times "cmp/str" 2 } } */
/* { dg-final { scan-assembler-times "tst\t#3" 1 } } */
/* { dg-do compile } */
/* { dg-additional-options "-fpic -std=c99" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
typedef unsigned int size_t;
typedef struct
/* { dg-do compile } */
/* { dg-additional-options "-fschedule-insns -fPIC -mprefergot" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
static __inline __attribute__ ((__always_inline__)) void *
_dl_mmap (void * start, int length, int prot, int flags, int fd,
/* Check that using -mdiv=call-fp compiles without fuzz. */
/* { dg-do compile } */
/* { dg-additional-options "-mdiv=call-fp" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
int
test_0 (int a, int b, int c, int d)
/* { dg-do compile } */
/* { dg-additional-options "-std=gnu99" } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
struct thread_info {
struct task_struct *task;
/* Check whether rte is generated for two ISRs. */
/* { dg-do compile } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-final { scan-assembler-times "rte" 2 } } */
extern void foo (void);
/* Check whether rte is generated only for an ISRs. */
/* { dg-do compile } */
-/* { dg-skip-if "" { "sh*-*-*" } { "-m5*" } { "" } } */
/* { dg-final { scan-assembler-times "rte" 1 } } */
#pragma interrupt