[RS6000] power8 unaligned fp load/store

According to the POWER8 Processor User’s Manual and some
experimentation on power8 hardware, unaligned fp load/store on power8
does not invoke the alignment interrupt.

	* config/rs6000/rs6000.h (SLOW_UNALIGNED_ACCESS): Make scalar
	float access depend on TARGET_EFFICIENT_UNALIGNED_VSX.
	* config/rs6000/rs6000.opt (-mefficient-unaligned-vsx): Renamed
	from -mefficient-unaligned-vector.  Note that this affects fp too.

From-SVN: r239013

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e8de5b9f605e06a21cb457be1d494991c5a6a2ef..3da9eb70fff2a026f430e2037e65f90b7e92514f 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2016-08-03  Alan Modra  <amodra@gmail.com>
+
+       * config/rs6000/rs6000.h (SLOW_UNALIGNED_ACCESS): Make scalar
+       float access depend on TARGET_EFFICIENT_UNALIGNED_VSX.
+       * config/rs6000/rs6000.opt (-mefficient-unaligned-vsx): Renamed
+       from -mefficient-unaligned-vector.  Note that this affects fp too.
+
 2016-08-03  Alan Modra  <amodra@gmail.com>
 
        * config/rs6000/rs6000.c (rs6000_rtx_costs): Make unaligned mem

diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 9b3e83bcd30db83c2ec7c67c1b5f7cbcf37d5932..af77258f1e36c61dbaff2e53efd617c1ba873003 100644 (file)
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -990,10 +990,10 @@ enum data_align { align_abi, align_opt, align_both };
    aligned to 4 or 8 bytes.  */
 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN)                             \
   (STRICT_ALIGNMENT                                                    \
-   || (SCALAR_FLOAT_MODE_NOT_VECTOR_P (MODE) && (ALIGN) < 32)          \
-   || (!TARGET_EFFICIENT_UNALIGNED_VSX                                  \
-       && ((VECTOR_MODE_P (MODE) || FLOAT128_VECTOR_P (MODE))          \
-          && (((int)(ALIGN)) < VECTOR_ALIGN (MODE)))))
+   || (!TARGET_EFFICIENT_UNALIGNED_VSX                                 \
+       && ((SCALAR_FLOAT_MODE_NOT_VECTOR_P (MODE) && (ALIGN) < 32)     \
+          || ((VECTOR_MODE_P (MODE) || FLOAT128_VECTOR_P (MODE))       \
+              && (int) (ALIGN) < VECTOR_ALIGN (MODE)))))
 
 \f
 /* Standard register usage.  */

diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 9e9d33e0d3282258b3276758ccdbd260ddbd2035..e47f47fb509e13705687c7fead6b7fa77415efad 100644 (file)
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -211,9 +211,9 @@ mallow-movmisalign
 Target Undocumented Var(TARGET_ALLOW_MOVMISALIGN) Init(-1) Save
 ; Allow the movmisalign in DF/DI vectors
 
-mefficient-unaligned-vector
+mefficient-unaligned-vsx
 Target Undocumented Report Mask(EFFICIENT_UNALIGNED_VSX) Var(rs6000_isa_flags)
-; Consider unaligned VSX accesses to be efficient
+; Consider unaligned VSX vector and fp accesses to be efficient
 
 mallow-df-permute
 Target Undocumented Var(TARGET_ALLOW_DF_PERMUTE) Save