mn10300.c (expand_epilogue): Correctly handle functions with large frames, but no...

        * mn10300/mn10300.c (expand_epilogue): Correctly handle functions
        with large frames, but no callee register saves.

        * mn10300/mn1300.md (movdf, movdi): Handle overlapping moves.

From-SVN: r13757

diff --git a/gcc/config/mn10300/mn10300.md b/gcc/config/mn10300/mn10300.md
index 477e99f3c9ccad41ed909487d54902e0bb1af664..c36ee9e85f70c8d3836293a1b2722514b12b245f 100644 (file)
--- a/gcc/config/mn10300/mn10300.md
+++ b/gcc/config/mn10300/mn10300.md
@@ -183,18 +183,47 @@
        (match_operand:DI 1 "general_operand" "0,0,I,d,a,d,a,dim,aim,dim,aim"))]
   "register_operand (operands[0], DImode)
    || register_operand (operands[1], DImode)"
-  "@
-  nop
-  nop
-  clr %L0\;clr %H0
-  mov %L1,%L0\;mov %H1,%H0
-  mov %L1,%L0\;mov %H1,%H0
-  mov %L1,%L0\;mov %H1,%H0
-  mov %L1,%L0\;mov %H1,%H0
-  mov %L1,%L0\;mov %H1,%H0
-  mov %L1,%L0\;mov %H1,%H0
-  mov %L1,%L0\;mov %H1,%H0
-  mov %L1,%L0\;mov %H1,%H0"
+  "*
+{
+  switch (which_alternative)
+    {
+      case 0:
+      case 1:
+       return \"nop\";
+
+      case 2:
+       return \"clr %L0\;clr %H0\";
+
+      case 3:
+      case 4:
+      case 5:
+      case 6:
+      case 7:
+      case 8:
+      case 9:
+      case 10:
+       if (GET_CODE (operands[1]) == MEM
+           && reg_overlap_mentioned_p (operands[0], XEXP (operands[1], 0)))
+         {
+           rtx temp = operands[0];
+
+           while (GET_CODE (temp) == SUBREG)
+             temp = SUBREG_REG (temp);
+
+           if (GET_CODE (temp) != REG)
+             abort ();
+
+           if (reg_overlap_mentioned_p (gen_rtx (REG, SImode, REGNO (temp)),
+                                        XEXP (operands[1], 0)))
+             return \"mov %H1,%H0\;mov %L1,%L0\";
+           else
+             return \"mov %L1,%L0\;mov %H1,%H0\";
+             
+         }
+       else
+         return \"mov %L1,%L0\;mov %H1,%H0\";
+    }
+}"
   [(set_attr "cc" "none,none,clobber,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit")])
 
 (define_expand "movdf"
@@ -214,18 +243,47 @@
        (match_operand:DF 1 "general_operand" "0,0,G,d,a,d,a,dim,aim,dim,aim"))]
   "register_operand (operands[0], DFmode)
    || register_operand (operands[1], DFmode)"
-  "@
-  nop
-  nop
-  clr %L0\;clr %H0
-  mov %L1,%L0\;mov %H1,%H0
-  mov %L1,%L0\;mov %H1,%H0
-  mov %L1,%L0\;mov %H1,%H0
-  mov %L1,%L0\;mov %H1,%H0
-  mov %L1,%L0\;mov %H1,%H0
-  mov %L1,%L0\;mov %H1,%H0
-  mov %L1,%L0\;mov %H1,%H0
-  mov %L1,%L0\;mov %H1,%H0"
+  "*
+{
+  switch (which_alternative)
+    {
+      case 0:
+      case 1:
+       return \"nop\";
+
+      case 2:
+       return \"clr %L0\;clr %H0\";
+
+      case 3:
+      case 4:
+      case 5:
+      case 6:
+      case 7:
+      case 8:
+      case 9:
+      case 10:
+       if (GET_CODE (operands[1]) == MEM
+           && reg_overlap_mentioned_p (operands[0], XEXP (operands[1], 0)))
+         {
+           rtx temp = operands[0];
+
+           while (GET_CODE (temp) == SUBREG)
+             temp = SUBREG_REG (temp);
+
+           if (GET_CODE (temp) != REG)
+             abort ();
+
+           if (reg_overlap_mentioned_p (gen_rtx (REG, SImode, REGNO (temp)),
+                                        XEXP (operands[1], 0)))
+             return \"mov %H1,%H0\;mov %L1,%L0\";
+           else
+             return \"mov %L1,%L0\;mov %H1,%H0\";
+             
+         }
+       else
+         return \"mov %L1,%L0\;mov %H1,%H0\";
+    }
+}"
   [(set_attr "cc" "none,none,clobber,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit,none_0hit")])