re PR rtl-optimization/90007 (ICE in extract_constrain_insn_cached, at recog.c:2223)

2019-11-27  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/90007
	* recog.c (constrain_operands): Permit hard registers too for
	memory when LRA is used.

2019-11-27  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/90007
	* gcc.target/i386/pr90007.c: New test.

From-SVN: r278770

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9899c377305a3742031308fb9fe1e994d5a461d0..f2cacc047d832998878af32c8428eb6cc7d39f18 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2019-11-27  Vladimir Makarov  <vmakarov@redhat.com>
+
+       PR rtl-optimization/90007
+       * recog.c (constrain_operands): Permit hard registers too for
+       memory when LRA is used.
+
 2019-11-27  Bernd Schmidt  <bernds_cb1@t-online.de>
 
        * config/m68k/m68k.c (m68k_output_compare_fp): Restore differences

diff --git a/gcc/recog.c b/gcc/recog.c
index 0482818c4539c2e73b6e0e0357e05c2ca5db1037..1b76503323a15581d13994ac892b1138b82aa277 100644 (file)
--- a/gcc/recog.c
+++ b/gcc/recog.c
@@ -2740,10 +2740,9 @@ constrain_operands (int strict, alternative_mask alternatives)
                               /* Before reload, accept what reload can turn
                                  into a mem.  */
                               || (strict < 0 && CONSTANT_P (op))
-                              /* Before reload, accept a pseudo,
+                              /* Before reload, accept a pseudo or hard register,
                                  since LRA can turn it into a mem.  */
-                              || (strict < 0 && targetm.lra_p () && REG_P (op)
-                                  && REGNO (op) >= FIRST_PSEUDO_REGISTER)
+                              || (strict < 0 && targetm.lra_p () && REG_P (op))
                               /* During reload, accept a pseudo  */
                               || (reload_in_progress && REG_P (op)
                                   && REGNO (op) >= FIRST_PSEUDO_REGISTER)))

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 4c01d147bf710b64f51594ce190a2c92f986f5b3..39728cf82ca13efb40e49bbe9edf1e2a72dfd005 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2019-11-27  Vladimir Makarov  <vmakarov@redhat.com>
+
+       PR rtl-optimization/90007
+       * gcc.target/i386/pr90007.c: New test.
+
 2019-11-27  Andrew Sutton  <asutton@lock3software.com>
 
        Emit hard errors for certain satisfaction errors.

diff --git a/gcc/testsuite/gcc.target/i386/pr90007.c b/gcc/testsuite/gcc.target/i386/pr90007.c
new file mode 100644 (file)
index 0000000..a16eec3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr90007.c
@@ -0,0 +1,15 @@
+/* PR rtl-optimization/90007 */
+/* { dg-do compile { target x86_64-*-* } } */
+/* { dg-options "-march=bdver1 -mfpmath=387 -O1 -fschedule-insns -fselective-scheduling" } */
+
+void
+qj (int b9, int r9, int k4, int k0, int e7)
+{
+  (void) b9;
+  (void) r9;
+  (void) k4;
+
+  while (!!k0 == e7 * 1.1)
+    {
+    }
+}