more clarification, mention C.LWSP/C.SWSP

diff --git a/simple_v_extension/specification.mdwn b/simple_v_extension/specification.mdwn
index ac9823e3c5a9b299cd9beef7a9c84692d6b23cd5..ab47af6379a3ed2bd9e7627f93eac9fbca877256 100644 (file)
--- a/simple_v_extension/specification.mdwn
+++ b/simple_v_extension/specification.mdwn
@@ -537,8 +537,14 @@ Notes:
 ## Vectorised Dual-operand instructions
 
 There is a series of 2-operand instructions involving copying (and
-sometimes alteration): C.MV, FMV, FNEG, FABS, FCVT, FSGNJ, LOAD(-FP)
-and STORE(-FP).  These operations all follow the same pattern, as it is
+sometimes alteration):
+
+* C.MV
+* FMV, FNEG, FABS, FCVT, FSGNJ, FSGNJN and FSGNJX
+* C.LWSP, C.SWSP, C.LDSP, C.FLWSP etc.
+* LOAD(-FP) and STORE(-FP)
+
+All of these operations follow the same two-operand pattern, so it is
 *both* the source *and* destination predication masks that are taken into
 account.  This is different from
 the three-operand arithmetic instructions, where the predication mask
@@ -562,15 +568,17 @@ follows:
 
 This pattern covers scalar-scalar, scalar-vector, vector-scalar
 and vector-vector, and predicated variants of all of those.
-Zeroing is not presently included (TODO).  As such, it covers
+Zeroing is not presently included (TODO).  As such, when compared
+to RVV, the twin-predicated variants of C.MV and FMV cover
 **all** standard vector operations: VINSERT, VSPLAT, VREDUCE,
 VEXTRACT, VSCATTER, VGATHER, VCOPY, and more.
 
 Note that:
 
-* elwidth (SIMD) is not covered above
+* elwidth (SIMD) is not covered in the pseudo-code above
 * ending the loop early in scalar cases (VINSERT, VEXTRACT) is also
   not covered
+* zero predication is also not shown (TODO).
 
 ### C.MV Instruction <a name="c_mv"></a>
 
@@ -687,7 +695,7 @@ scalar RV LOAD operation:
 
 ## Compressed Stack LOAD / STORE Instructions
 
-TODO
+
 
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