sim: lm32: hoist cgen rules to top-level

diff --git a/sim/Makefile.in b/sim/Makefile.in
index 3cf2baf4815b4e0386bc8253a6291a508eb52e30..a063b0cac94849948ead713ab6d423b2852a084b 100644 (file)
--- a/sim/Makefile.in
+++ b/sim/Makefile.in
@@ -3646,6 +3646,16 @@ testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/commo
 @SIM_ENABLE_ARCH_lm32_TRUE@    $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/mloop.cin lm32/mloop.c
 @SIM_ENABLE_ARCH_lm32_TRUE@    $(AM_V_at)touch $@
 
+@SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen: lm32/cgen-arch lm32/cgen-cpu-decode
+
+@SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-arch:
+@SIM_ENABLE_ARCH_lm32_TRUE@    $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
+@SIM_ENABLE_ARCH_lm32_TRUE@lm32/arch.h lm32/arch.c lm32/cpuall.h: @CGEN_MAINT@ lm32/cgen-arch
+
+@SIM_ENABLE_ARCH_lm32_TRUE@lm32/cgen-cpu-decode:
+@SIM_ENABLE_ARCH_lm32_TRUE@    $(AM_V_GEN)cpu=lm32bf mach=lm32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
+@SIM_ENABLE_ARCH_lm32_TRUE@lm32/cpu.h lm32/sem.c lm32/sem-switch.c lm32/model.c lm32/decode.c lm32/decode.h: @CGEN_MAINT@ lm32/cgen-cpu-decode
+
 @SIM_ENABLE_ARCH_m32c_TRUE@m32c/%.o: m32c/%.c | m32c/libsim.a $(SIM_ALL_RECURSIVE_DEPS)
 @SIM_ENABLE_ARCH_m32c_TRUE@    $(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
 

diff --git a/sim/lm32/Makefile.in b/sim/lm32/Makefile.in
index ea6601fab0677c1f9a057e320598b11086d72465..a39420f592702a98cd0c2554a84ee3547367c653 100644 (file)
--- a/sim/lm32/Makefile.in
+++ b/sim/lm32/Makefile.in
@@ -14,26 +14,4 @@ SIM_OBJS = \
         cpu.o decode.o sem.o model.o mloop.o \
         lm32.o traps.o user.o 
 
-SIM_EXTRA_CLEAN = lm32-clean
-
 ## COMMON_POST_CONFIG_FRAG
-
-lm32-clean:
-       rm -f stamp-arch stamp-cpu 
-       rm -f tmp-*
-
-stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/lm32.cpu
-       $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
-         archfile=$(CPU_DIR)/lm32.cpu \
-         FLAGS="with-scache with-profile=fn"
-       $(SILENCE) touch $@
-arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
-
-stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/lm32.cpu
-       $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
-         cpu=lm32bf mach=lm32 SUFFIX= \
-         archfile=$(CPU_DIR)/lm32.cpu \
-         FLAGS="with-scache with-profile=fn" \
-         EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
-       $(SILENCE) touch $@
-cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu

diff --git a/sim/lm32/local.mk b/sim/lm32/local.mk
index 510d34b2b9b07e129b6bc704cd5360f1ad075a63..bdef055b6e368b3b7aa49628bc1b658bade19c98 100644 (file)
--- a/sim/lm32/local.mk
+++ b/sim/lm32/local.mk
@@ -47,3 +47,14 @@ SIM_ALL_RECURSIVE_DEPS += $(%C%_BUILD_OUTPUTS)
        $(AM_V_at)touch $@
 
 MOSTLYCLEANFILES += $(%C%_BUILD_OUTPUTS)
+
+## Target that triggers all cgen targets that works when --disable-cgen-maint.
+%D%/cgen: %D%/cgen-arch %D%/cgen-cpu-decode
+
+%D%/cgen-arch:
+       $(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
+%D%/arch.h %D%/arch.c %D%/cpuall.h: @CGEN_MAINT@ %D%/cgen-arch
+
+%D%/cgen-cpu-decode:
+       $(AM_V_GEN)cpu=lm32bf mach=lm32 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
+%D%/cpu.h %D%/sem.c %D%/sem-switch.c %D%/model.c %D%/decode.c %D%/decode.h: @CGEN_MAINT@ %D%/cgen-cpu-decode