dev-arm: FVPBasePwrCtrl, fix vector resizing
authorAdrian Herrera <adrian.herrera@arm.com>
Wed, 8 Jul 2020 16:03:34 +0000 (17:03 +0100)
committerAdrian Herrera <adrian.herrera@arm.com>
Thu, 24 Sep 2020 14:01:09 +0000 (14:01 +0000)
(1) ThreadContexts are registered into System in BaseCPU::init.
(2) FVPBasePwrCtrl state is resized based on registered ThreadContexts
in FVPBasePwrCtrl::init.

FVPBasePwrCtrl::init may be called before BaseCPU::init based on the
model names alphabetical order, leading to segmentation faults.
To fix this, (2) is now carried out in FVPBasePwrCtrl::startup.

Change-Id: Ica6c5b7448da556d61aee53f8777a709fcad2212
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/35075
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/dev/arm/fvp_base_pwr_ctrl.cc
src/dev/arm/fvp_base_pwr_ctrl.hh

index fc66e1c33ae424af098114a386a29b12afd1ab62..d6b6a5980a090d13fa42344d830c8e5fdc30f08d 100644 (file)
@@ -58,13 +58,13 @@ FVPBasePwrCtrl::FVPBasePwrCtrl(FVPBasePwrCtrlParams *const params)
 }
 
 void
-FVPBasePwrCtrl::init()
+FVPBasePwrCtrl::startup()
 {
     // All cores are ON by default (PwrStatus.{l0,l1} = 0b1)
     corePwrStatus.resize(sys->threads.size(), 0x60000000);
     for (const auto &tc : sys->threads)
         poweredCoresPerCluster[tc->socketId()] += 1;
-    BasicPioDevice::init();
+    BasicPioDevice::startup();
 }
 
 void
index aa446a8667d69a6fb0d6bc94a41bd05b5cc817ac..92c31980a1945f08c25c6ab188bc88316d32678b 100644 (file)
@@ -88,7 +88,7 @@ class FVPBasePwrCtrl : public BasicPioDevice
      */
     void clearWakeRequest(ThreadContext *const tc);
 
-    void init() override;
+    void startup() override;
 
   protected:
     Tick read(PacketPtr pkt) override;