just as core upload logic does.
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
dw5 |= GEN6_WM_LINE_END_CAP_AA_WIDTH_0_5;
dw5 |= (brw->max_wm_threads - 1) << GEN6_WM_MAX_THREADS_SHIFT;
dw6 |= 0 << GEN6_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT; /* No interp */
- dw6 |= 0 << GEN6_WM_NUM_SF_OUTPUTS_SHIFT; /* No inputs from SF */
+ dw6 |= (params->wm_prog_data ? prog_data->num_varying_inputs : 0) <<
+ GEN6_WM_NUM_SF_OUTPUTS_SHIFT;
+
if (params->wm_prog_data) {
dw5 |= GEN6_WM_DISPATCH_ENABLE; /* We are rendering */
dw4 |= GEN7_PS_8_DISPATCH_ENABLE;
if (params->wm_prog_data->dispatch_16)
dw4 |= GEN7_PS_16_DISPATCH_ENABLE;
+ if (params->wm_prog_data->num_varying_inputs)
+ dw4 |= GEN7_PS_ATTRIBUTE_ENABLE;
} else {
/* The hardware gets angry if we don't enable at least one dispatch
* mode, so just enable 16-pixel dispatch if we don't have a program.
dw1 |= GEN8_PSX_PIXEL_SHADER_VALID;
- if (params->src.mt) {
+ if (params->src.mt)
dw1 |= GEN8_PSX_KILL_ENABLE;
+
+ if (params->wm_prog_data->num_varying_inputs)
dw1 |= GEN8_PSX_ATTRIBUTE_ENABLE;
- }
if (params->dst.num_samples > 1 && prog_data &&
prog_data->persample_msaa_dispatch)