re PR target/64093 (ICE error: unrecognizable insn with -mcpu=cell)

	PR target/64093
	* config/rs6000/rs6000.md (and<mode>3): Don't generate
	and<mode>3_imm unless rs6000_gen_cell_microcode is true.

From-SVN: r218164

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 24112ee201c346db730b64df0daae66741a5ec49..b8f8dbe8bbed5034a03dde05893609b4ffd7237e 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2014-11-28  Segher Boessenkool  <segher@kernel.crashing.org>
+
+       PR target/64093
+       * config/rs6000/rs6000.md (and<mode>3): Don't generate
+       and<mode>3_imm unless rs6000_gen_cell_microcode is true.
+
 2014-11-28  Vladimir Makarov  <vmakarov@redhat.com>
 
        PR rtl-optimization/64087

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index c8c3a680d823db8fc28579f16f994ba07c48395d..f3b5aae18e69ec8aba26fb23e755e77ed21c2481 100644 (file)
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -2646,8 +2646,13 @@
   if (logical_const_operand (operands[2], <MODE>mode)
       && !any_mask_operand (operands[2], <MODE>mode))
     {
-      emit_insn (gen_and<mode>3_imm (operands[0], operands[1], operands[2]));
-      DONE;
+      if (rs6000_gen_cell_microcode)
+       {
+         emit_insn (gen_and<mode>3_imm (operands[0], operands[1], operands[2]));
+         DONE;
+       }
+      else
+       operands[2] = force_reg (<MODE>mode, operands[2]);
     }
 
   if ((<MODE>mode == DImode && !and64_2_operand (operands[2], <MODE>mode))