(no commit message)

diff --git a/openpower/sv/bitmanip.mdwn b/openpower/sv/bitmanip.mdwn
index fc88baf2e3ad6d0aa21d752fadf4e50b12ba3f09..acf728cb8157c79f89a0eb1ee26f83fad6e0bac8 100644 (file)
--- a/openpower/sv/bitmanip.mdwn
+++ b/openpower/sv/bitmanip.mdwn
@@ -192,6 +192,8 @@ another mode selection would be CRs not Ints.
 # bitmask set
 
 based on RV bitmanip singlebit set, instruction format similar to shift
+[[isa/fixedshift]].  bmext is actually covered already (shift-with-mask).
+however bitmask-invert is not, and set/clr are not covered, although they can ise the same Shift ALU.
 
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