[ARC] Add XY registers, update neg instruction.

gas/
2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/tc-arc.c (md_begin): Add XY registers.
	(cpu_types): Code density is default off for ARC EM.

opcodes/
2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>

	* arc-tbl.h (neg): New instruction variant.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index a2b1dcbf8d3be8089a789c1873d31f53bb47410c..64e890b278c33053a2521529634e627ca395e6e4 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
+
+       * config/tc-arc.c (md_begin): Add XY registers.
+       (cpu_types): Code density is default off for ARC EM.
+
 2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
 
        * config/tc-arc.c (attributes_t): Renamed attribute class to

diff --git a/gas/config/tc-arc.c b/gas/config/tc-arc.c
index 7f8ca26fe79e0407508071d8d97223a3300155db..7eb577f5e5b0d731d341c28484dd14be6c3d1867 100644 (file)
--- a/gas/config/tc-arc.c
+++ b/gas/config/tc-arc.c
@@ -428,7 +428,7 @@ static const struct cpu_type
   { "nps400", ARC_OPCODE_ARC700 | ARC_OPCODE_NPS400, bfd_mach_arc_nps400,
     E_ARC_MACH_NPS400,  0x00},
   { "arcem",  ARC_OPCODE_ARCv2EM, bfd_mach_arc_arcv2,
-    EF_ARC_CPU_ARCV2EM, ARC_CD},
+    EF_ARC_CPU_ARCV2EM, 0x00},
   { "archs",  ARC_OPCODE_ARCv2HS, bfd_mach_arc_arcv2,
     EF_ARC_CPU_ARCV2HS, ARC_CD},
   { 0, 0, 0, 0, 0 }
@@ -2381,6 +2381,32 @@ md_begin (void)
   declare_register ("ilink2", 30);
   declare_register ("blink", 31);
 
+  /* XY memory registers.  */
+  declare_register ("x0_u0", 32);
+  declare_register ("x0_u1", 33);
+  declare_register ("x1_u0", 34);
+  declare_register ("x1_u1", 35);
+  declare_register ("x2_u0", 36);
+  declare_register ("x2_u1", 37);
+  declare_register ("x3_u0", 38);
+  declare_register ("x3_u1", 39);
+  declare_register ("y0_u0", 40);
+  declare_register ("y0_u1", 41);
+  declare_register ("y1_u0", 42);
+  declare_register ("y1_u1", 43);
+  declare_register ("y2_u0", 44);
+  declare_register ("y2_u1", 45);
+  declare_register ("y3_u0", 46);
+  declare_register ("y3_u1", 47);
+  declare_register ("x0_nu", 48);
+  declare_register ("x1_nu", 49);
+  declare_register ("x2_nu", 50);
+  declare_register ("x3_nu", 51);
+  declare_register ("y0_nu", 52);
+  declare_register ("y1_nu", 53);
+  declare_register ("y2_nu", 54);
+  declare_register ("y3_nu", 55);
+
   declare_register ("mlo", 57);
   declare_register ("mmid", 58);
   declare_register ("mhi", 59);

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 02d24197ec20cca2468bf505908f4143a99694c4..5236985736772e1fbbf84bf862d48b29a8391c55 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
+
+       * arc-tbl.h (neg): New instruction variant.
+
 2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
 
        * arc-dis.c (find_format, find_format, get_auxreg)

diff --git a/opcodes/arc-tbl.h b/opcodes/arc-tbl.h
index 8751bdbfa069cdb7768ac2cdafec72c3acc9a9d4..c325be68727adf0271624eb2717a52ca65c2f4fc 100644 (file)
--- a/opcodes/arc-tbl.h
+++ b/opcodes/arc-tbl.h
@@ -12723,6 +12723,9 @@
 /* neg<.f> a,b 00100bbb01001110FBBB000000AAAAAA.  */
 { "neg", 0x204E0000, 0xF8FF0FC0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, NONE, { RA, RB }, { C_F }},
 
+/* neg<.f> 0,b 00100bbb01001110FBBB000000111110.  */
+{ "neg", 0x204E0000, 0xF8FF0FFF, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, NONE, { ZA, RB }, { C_F }},
+
 /* neg<.f><.cc> b,b 00100bbb11001110FBBB0000001QQQQQ.  */
 { "neg", 0x20CE0020, 0xF8FF0FE0, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, ARITH, NONE, { RB, RBdup }, { C_F, C_CC }},