* config/tc-crx.c (gettrap): Constify arg.
(handle_LoadStor, get_cinv_parameters): Likewise.
(getreg_image): Fix enum warning
(md_assemble): Restore input line char.
* config/tc-hppa.c (tc_gen_reloc): Fix enum warning.
* config/tc-i960.c (mem_fmt): Rename var to fix shadow warning.
* config/tc-sh.c (sh_fdpic): Only define when OBJ_ELF.
(build_Mytes): Fix build failure for non-elf targets.
* config/tc-tic4x.c (tic4x_eval): Restore terminator char.
* config/tc-xtensa.c (xtensa_end_directive): Fix switch enum warning.
* cgen.c (gas_cgen_md_apply_fix): Avoid set but unused warning.
* ecoff.c (add_ecoff_symbol): Likewise.
* itbl-ops.c (append_insns_as_macros): Likewise.
* listing.c (debugging_pseudo): Likewise.
* read.c (s_mri_common, stringer): Likewise.
* config/obj-coff.c (coff_frob_section): Likewise.
* config/tc-alpha.c (emit_ldgp, s_alpha_proc): Likewise.
* config/tc-arm.c (my_get_expression): Likewise.
* config/tc-hppa.c (process_exit, pa_type_args): Likewise.
* config/tc-m32c.c (md_assemble): Likewise.
* config/tc-microblaze.c (md_convert_frag): Likewise.
* config/tc-mips.c (s_change_section): Likewise.
* config/tc-mt.c (mt_fix_adjustable): Likewise.
* config/tc-xtensa.c (xtensa_literal_pseudo): Likewise.
* config/obj-aout.c (obj_aout_frob_symbol): Delete set but otherwise
unused vars.
* config/tc-alpha.c (load_expression): Likewise.
(s_alpha_rdata, s_alpha_section, s_alpha_prologue): Likewise.
* config/tc-arm.c (parse_neon_el_struct_list): Likewise.
* config/tc-avr.c (extract_word): Likewise.
* config/tc-cris.c (cris_get_expression): Likewise.
* config/tc-d30v.c (build_insn, find_format): Likewise.
* config/tc-dlx.c (machine_ip): Likewise.
* config/tc-hppa.c (pa_get_absolute_expression): Likewise.
* config/tc-i370.c (md_assemble): Likewise.
* config/tc-i960.c (brtab_emit): Likewise.
* config/tc-iq2000.c (s_iq2000_ent): Likewise.
* config/tc-m32c.c (md_convert_frag): Likewise.
* config/tc-m68hc11.c (fixup24, build_jump_insn): Likewise.
(md_estimate_size_before_relax, md_apply_fix): Likewise.
* config/tc-m68k.c (md_show_usage): Likewise.
* config/tc-microblaze.c (microblaze_s_lcomm): Likewise.
* config/tc-mips.c (s_mips_end): Likewise.
* config/tc-mmix.c (mmix_byte, mmix_cons): Likewise.
* config/tc-mn10300.c (md_assemble): Likewise.
* config/tc-msp430.c (extract_word): Likewise.
* config/tc-mt.c (md_assemble): Likewise.
* config/tc-or32.c (machine_ip): Likewise.
* config/tc-pj.c (md_apply_fix): Likewise.
* config/tc-s390.c (md_gather_operands): Likewise.
* config/tc-sh.c (sh_cons_align): Likewise.
* config/tc-sparc.c (sparc_cons_align): Likewise.
* config/tc-tic4x.c (tic4x_sect): Likewise.
* config/tc-tic54x.c (tic54x_stringer): Likewise.
* config/tc-vax.c (vip_op): Likewise.
* config/tc-xstormy16.c (xstormy16_cons_fix_new): Likewise.
* config/tc-xtensa.c (md_assemble): Likewise.
(xtensa_fix_short_loop_frags, convert_frag_immed): Likewise.
(xtensa_move_literals): Likewise.
+2010-06-28 Alan Modra <amodra@gmail.com>
+
+ * config/obj-evax.h (S_SET_OTHER, S_SET_TYPE, S_SET_DESC): Don't define.
+ * config/tc-crx.c (gettrap): Constify arg.
+ (handle_LoadStor, get_cinv_parameters): Likewise.
+ (getreg_image): Fix enum warning
+ (md_assemble): Restore input line char.
+ * config/tc-hppa.c (tc_gen_reloc): Fix enum warning.
+ * config/tc-i960.c (mem_fmt): Rename var to fix shadow warning.
+ * config/tc-sh.c (sh_fdpic): Only define when OBJ_ELF.
+ (build_Mytes): Fix build failure for non-elf targets.
+ * config/tc-tic4x.c (tic4x_eval): Restore terminator char.
+ * config/tc-xtensa.c (xtensa_end_directive): Fix switch enum warning.
+
+ * cgen.c (gas_cgen_md_apply_fix): Avoid set but unused warning.
+ * ecoff.c (add_ecoff_symbol): Likewise.
+ * itbl-ops.c (append_insns_as_macros): Likewise.
+ * listing.c (debugging_pseudo): Likewise.
+ * read.c (s_mri_common, stringer): Likewise.
+ * config/obj-coff.c (coff_frob_section): Likewise.
+ * config/tc-alpha.c (emit_ldgp, s_alpha_proc): Likewise.
+ * config/tc-arm.c (my_get_expression): Likewise.
+ * config/tc-hppa.c (process_exit, pa_type_args): Likewise.
+ * config/tc-m32c.c (md_assemble): Likewise.
+ * config/tc-microblaze.c (md_convert_frag): Likewise.
+ * config/tc-mips.c (s_change_section): Likewise.
+ * config/tc-mt.c (mt_fix_adjustable): Likewise.
+ * config/tc-xtensa.c (xtensa_literal_pseudo): Likewise.
+
+ * config/obj-aout.c (obj_aout_frob_symbol): Delete set but otherwise
+ unused vars.
+ * config/tc-alpha.c (load_expression): Likewise.
+ (s_alpha_rdata, s_alpha_section, s_alpha_prologue): Likewise.
+ * config/tc-arm.c (parse_neon_el_struct_list): Likewise.
+ * config/tc-avr.c (extract_word): Likewise.
+ * config/tc-cris.c (cris_get_expression): Likewise.
+ * config/tc-d30v.c (build_insn, find_format): Likewise.
+ * config/tc-dlx.c (machine_ip): Likewise.
+ * config/tc-hppa.c (pa_get_absolute_expression): Likewise.
+ * config/tc-i370.c (md_assemble): Likewise.
+ * config/tc-i960.c (brtab_emit): Likewise.
+ * config/tc-iq2000.c (s_iq2000_ent): Likewise.
+ * config/tc-m32c.c (md_convert_frag): Likewise.
+ * config/tc-m68hc11.c (fixup24, build_jump_insn): Likewise.
+ (md_estimate_size_before_relax, md_apply_fix): Likewise.
+ * config/tc-m68k.c (md_show_usage): Likewise.
+ * config/tc-microblaze.c (microblaze_s_lcomm): Likewise.
+ * config/tc-mips.c (s_mips_end): Likewise.
+ * config/tc-mmix.c (mmix_byte, mmix_cons): Likewise.
+ * config/tc-mn10300.c (md_assemble): Likewise.
+ * config/tc-msp430.c (extract_word): Likewise.
+ * config/tc-mt.c (md_assemble): Likewise.
+ * config/tc-or32.c (machine_ip): Likewise.
+ * config/tc-pj.c (md_apply_fix): Likewise.
+ * config/tc-s390.c (md_gather_operands): Likewise.
+ * config/tc-sh.c (sh_cons_align): Likewise.
+ * config/tc-sparc.c (sparc_cons_align): Likewise.
+ * config/tc-tic4x.c (tic4x_sect): Likewise.
+ * config/tc-tic54x.c (tic54x_stringer): Likewise.
+ * config/tc-vax.c (vip_op): Likewise.
+ * config/tc-xstormy16.c (xstormy16_cons_fix_new): Likewise.
+ * config/tc-xtensa.c (md_assemble): Likewise.
+ (xtensa_fix_short_loop_frags, convert_frag_immed): Likewise.
+ (xtensa_move_literals): Likewise.
+
2010-06-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/tc-arm.c (parse_neon_alignment): New function.
/* GAS interface for targets using CGEN: Cpu tools GENerator.
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
- 2006, 2007, 2009 Free Software Foundation, Inc.
+ 2006, 2007, 2009, 2010 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
bfd_reloc_code_real_type reloc_type;
CGEN_FIELDS *fields = alloca (CGEN_CPU_SIZEOF_FIELDS (cd));
const CGEN_INSN *insn = fixP->fx_cgen.insn;
+#ifdef OBJ_COMPLEX_RELC
int start;
int length;
int signed_p = 0;
values will be signed relocs, but it's possible. */
if (operand && (operand->hw_type == HW_H_SINT))
signed_p = 1;
+#endif
/* If the reloc has been fully resolved finish the operand here. */
/* FIXME: This duplicates the capabilities of code in BFD. */
/* a.out object file format
Copyright 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1999, 2000,
- 2001, 2002, 2003, 2004, 2005, 2007, 2009 Free Software Foundation, Inc.
+ 2001, 2002, 2003, 2004, 2005, 2007, 2009, 2010
+ Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
{
flagword flags;
asection *sec;
- int desc, type, other;
+ int type;
flags = symbol_get_bfdsym (sym)->flags;
- desc = aout_symbol (symbol_get_bfdsym (sym))->desc;
type = aout_symbol (symbol_get_bfdsym (sym))->type;
- other = aout_symbol (symbol_get_bfdsym (sym))->other;
sec = S_GET_SEGMENT (sym);
/* Only frob simple symbols this way right now. */
/* coff object file format
Copyright 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009
+ 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010
Free Software Foundation, Inc.
This file is part of GAS.
segT strsec;
char *p;
fragS *fragp;
- bfd_vma size, n_entries, mask;
- bfd_vma align_power = (bfd_vma)sec->alignment_power + OCTETS_PER_BYTE_POWER;
+ bfd_vma n_entries;
/* The COFF back end in BFD requires that all section sizes be
rounded up to multiples of the corresponding section alignments,
supposedly because standard COFF has no other way of encoding alignment
for sections. If your COFF flavor has a different way of encoding
section alignment, then skip this step, as TICOFF does. */
- size = bfd_get_section_size (sec);
- mask = ((bfd_vma) 1 << align_power) - 1;
+ bfd_vma size = bfd_get_section_size (sec);
#if !defined(TICOFF)
+ bfd_vma align_power = (bfd_vma) sec->alignment_power + OCTETS_PER_BYTE_POWER;
+ bfd_vma mask = ((bfd_vma) 1 << align_power) - 1;
+
if (size & mask)
{
bfd_vma new_size;
/* This file is obj-evax.h
- Copyright 1996, 2000, 2005, 2007, 2009 Free Software Foundation, Inc.
+ Copyright 1996, 2000, 2005, 2007, 2009, 2010
+ Free Software Foundation, Inc.
Contributed by Klaus Kämpf (kkaempf@progis.de) of
proGIS Software, Aachen, Germany.
#define obj_frob_file_before_adjust evax_frob_file_before_adjust
#define obj_frob_file_before_fix evax_frob_file_before_fix
-#define S_SET_OTHER(S,V)
-#define S_SET_TYPE(S,T)
-#define S_SET_DESC(S,D)
#define S_GET_OTHER(S) 0
#define S_GET_TYPE(S) 0
#define S_GET_DESC(S) 0
/* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU.
Copyright 1989, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
- 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009
+ 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010
Free Software Foundation, Inc.
Contributed by Carnegie Mellon University, 1993.
Written by Alessandro Forin, based on earlier gas-1.38 target CPU files.
/* Add a NOP fixup for 'ldX $26,YYY..NAME..lk'. */
char *ensymname;
symbolS *ensym;
- volatile asymbol *dummy;
/* Build the entry name as 'NAME..en'. */
ptr1 = strstr (symname, "..") + 2;
/* ??? Force bsym to be instantiated now, as it will be
too late to do so in tc_gen_reloc. */
- dummy = symbol_get_bfdsym (exp->X_add_symbol);
+ symbol_get_bfdsym (exp->X_add_symbol);
}
else if (alpha_flag_replace && targreg == 27)
{
/* Implement the ldgp macro. */
static void
-emit_ldgp (const expressionS *tok,
+emit_ldgp (const expressionS *tok ATTRIBUTE_UNUSED,
int ntok ATTRIBUTE_UNUSED,
const void * unused ATTRIBUTE_UNUSED)
{
insn.sequence = next_sequence_num--;
emit_insn (&insn);
-#else /* OBJ_ECOFF || OBJ_ELF */
- /* Avoid warning. */
- tok = NULL;
-#endif
+#endif /* OBJ_ECOFF || OBJ_ELF */
}
/* The macro table. */
static void
s_alpha_rdata (int ignore ATTRIBUTE_UNUSED)
{
- int temp;
-
- temp = get_absolute_expression ();
+ get_absolute_expression ();
subseg_new (".rdata", 0);
demand_empty_rest_of_line ();
alpha_insn_label = NULL;
static void
s_alpha_sdata (int ignore ATTRIBUTE_UNUSED)
{
- int temp;
-
- temp = get_absolute_expression ();
+ get_absolute_expression ();
subseg_new (".sdata", 0);
demand_empty_rest_of_line ();
alpha_insn_label = NULL;
static void
s_alpha_section (int secid)
{
- int temp;
char *name, *beg;
segT sec;
flagword vms_flags = 0;
}
else
{
- temp = get_absolute_expression ();
+ get_absolute_expression ();
subseg_new (section_name[secid], 0);
}
static void
s_alpha_prologue (int ignore ATTRIBUTE_UNUSED)
{
- int arg;
-
- arg = get_absolute_expression ();
+ get_absolute_expression ();
demand_empty_rest_of_line ();
alpha_prologue_label = symbol_new
(FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now);
temp = get_absolute_expression ();
}
/* *symbol_get_obj (symbolP) = (signed char) temp; */
+ (void) symbolP;
as_warn (_("unhandled: .proc %s,%d"), name, temp);
demand_empty_rest_of_line ();
}
input_line_pointer = save_in;
return 1;
}
+#else
+ (void) seg;
#endif
/* Get rid of any bignums now, so that we don't generate an error for which
int lane = -1;
int leading_brace = 0;
enum arm_reg_type rtype = REG_TYPE_NDQ;
- int addregs = 1;
const char *const incr_error = _("register stride must be 1 or 2");
const char *const type_error = _("mismatched element/structure types in list");
struct neon_typed_alias firsttype;
if (rtype == REG_TYPE_NQ)
{
reg_incr = 1;
- addregs = 2;
}
firsttype = atype;
}
static char *
extract_word (char *from, char *to, int limit)
{
- char *op_start;
char *op_end;
int size = 0;
*to = 0;
/* Find the op code end. */
- for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
+ for (op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
{
to[size++] = *op_end++;
if (size + 1 >= limit)
/* tc-cris.c -- Assembler code for the CRIS CPU core.
- Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
Free Software Foundation, Inc.
Contributed by Axis Communications AB, Lund, Sweden.
cris_get_expression (char **cPP, expressionS *exprP)
{
char *saved_input_line_pointer;
- segT exp;
/* The "expression" function expects to find an expression at the
global variable input_line_pointer, so we have to save it to give
return 0;
}
- exp = expression (exprP);
+ expression (exprP);
if (exprP->X_op == O_illegal || exprP->X_op == O_absent)
{
input_line_pointer = saved_input_line_pointer;
/* tc-crx.c -- Assembler code for the CRX CPU core.
- Copyright 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+ Copyright 2004, 2005, 2006, 2007, 2008, 2009, 2010
+ Free Software Foundation, Inc.
Contributed by Tomer Levi, NSC, Israel.
Originally written for GAS 2.12 by Tomer Levi, NSC, Israel.
static int get_opflags (operand_type);
static int get_number_of_operands (void);
static void parse_operand (char *, ins *);
-static int gettrap (char *);
-static void handle_LoadStor (char *);
-static int get_cinv_parameters (char *);
+static int gettrap (const char *);
+static void handle_LoadStor (const char *);
+static int get_cinv_parameters (const char *);
static long getconstant (long, int);
static op_err check_range (long *, int, unsigned int, int);
static int getreg_image (reg);
This routine is used by assembling the 'excp' instruction. */
static int
-gettrap (char *s)
+gettrap (const char *s)
{
const trap_entry *trap;
Otherwise, the insn will be mistakenly identified as of type LD_STOR_INS. */
static void
-handle_LoadStor (char *operands)
+handle_LoadStor (const char *operands)
{
/* Post-Increment instructions precede Store-Immediate instructions in
CRX instruction table, hence they are handled before.
/* Cinv instruction requires special handling. */
static int
-get_cinv_parameters (char * operand)
+get_cinv_parameters (const char *operand)
{
- char *p = operand;
+ const char *p = operand;
int d_used = 0, i_used = 0, u_used = 0, b_used = 0;
while (*++p != ']')
if (r < MAX_REG)
rreg = &crx_regtab[r];
/* Check whether the register is in coprocessor registers table. */
- else if (r < MAX_COPREG)
+ else if (r < (int) MAX_COPREG)
rreg = &crx_copregtab[r-MAX_REG];
/* Register not found. */
else
if (instruction == NULL)
{
as_bad (_("Unknown opcode: `%s'"), op);
+ param[-1] = c;
return;
}
/* Assemble the instruction - return upon failure. */
if (assemble_insn (op, &crx_ins) == 0)
- return;
+ {
+ param[-1] = c;
+ return;
+ }
/* Print the instruction. */
+ param[-1] = c;
print_insn (&crx_ins);
}
/* tc-d30v.c -- Assembler code for the Mitsubishi D30V
Copyright 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007, 2008,
- 2009 Free Software Foundation, Inc.
+ 2009, 2010 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
static long long
build_insn (struct d30v_insn *opcode, expressionS *opers)
{
- int i, length, bits, shift, flags;
+ int i, bits, shift, flags;
unsigned long number, id = 0;
long long insn;
struct d30v_opcode *op = opcode->op;
if (flags & OPERAND_SHIFT)
bits += 3;
- length = d30v_operand_table[form->operands[i]].length;
shift = 12 - d30v_operand_table[form->operands[i]].position;
if (opers[i].X_op != O_symbol)
number = opers[i].X_add_number;
int fsize,
int cmp_hack)
{
- int numops, match, opcode_index, i = 0, j, k;
+ int match, opcode_index, i = 0, j, k;
struct d30v_format *fm;
if (opcode == NULL)
return NULL;
/* Get all the operands and save them as expressions. */
- numops = get_operands (myops, cmp_hack);
+ get_operands (myops, cmp_hack);
while ((opcode_index = opcode->format[i++]) != 0)
{
/* tc-ldx.c -- Assemble for the DLX
- Copyright 2002, 2003, 2004, 2005, 2007, 2009
+ Copyright 2002, 2003, 2004, 2005, 2007, 2009, 2010
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
char *s;
const char *args;
struct machine_opcode *insn;
- char *argsStart;
unsigned long opcode;
expressionS the_operand;
expressionS *operand = &the_operand;
return;
}
- argsStart = s;
opcode = insn->opcode;
memset (&the_insn, '\0', sizeof (the_insn));
the_insn.reloc = NO_RELOC;
/* tc-hppa.c -- Assemble for the PA
Copyright 1989, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
- 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+ 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
+ Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
/* ??? It might be better to hide this +8 stuff in tc_cfi_emit_pcrel_expr,
undefine DIFF_EXPR_OK, and let these sorts of complex expressions fail
when R_HPPA_COMPLEX == R_PARISC_UNIMPLEMENTED. */
- if (fixp->fx_r_type == R_HPPA_COMPLEX && fixp->fx_pcrel)
+ if (fixp->fx_r_type == (bfd_reloc_code_real_type) R_HPPA_COMPLEX
+ && fixp->fx_pcrel)
{
fixp->fx_r_type = R_HPPA_PCREL_CALL;
fixp->fx_offset += 8;
if (insn->exp.X_op == O_modulus)
{
char *s, c;
- int retval;
input_line_pointer = *strp;
s = *strp;
c = *s;
*s = 0;
- retval = pa_get_absolute_expression (insn, strp);
+ pa_get_absolute_expression (insn, strp);
input_line_pointer = save_in;
*s = c;
/* Mark the end of the function, stuff away the location of the frag
for the end of the function, and finally call pa_build_unwind_subspace
to add an entry in the unwind table. */
+ (void) where;
hppa_elf_mark_end_of_function ();
pa_build_unwind_subspace (last_call_info);
#else
to the SOM BFD backend. */
#ifdef obj_set_symbol_type
obj_set_symbol_type (bfdsym, (int) type);
+#else
+ (void) type;
#endif
/* Now that the type of the exported symbol has been handled,
arg_reloc = pa_align_arg_reloc (temp, pa_build_arg_reloc (name));
#if defined (OBJ_SOM) || defined (ELF_ARG_RELOC)
symbol_arg_reloc_info (symbolP) |= arg_reloc;
+#else
+ (void) arg_reloc;
#endif
*input_line_pointer = c;
}
arg_reloc = pa_build_arg_reloc (name);
#if defined (OBJ_SOM) || defined (ELF_ARG_RELOC)
symbol_arg_reloc_info (symbolP) |= arg_reloc;
+#else
+ (void) arg_reloc;
#endif
*input_line_pointer = c;
}
/* tc-i370.c -- Assembler for the IBM 360/370/390 instruction set.
Loosely based on the ppc files by Linas Vepstas <linas@linas.org> 1998, 99
Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
- 2004, 2005, 2006, 2007, 2009 Free Software Foundation, Inc.
+ 2004, 2005, 2006, 2007, 2009, 2010 Free Software Foundation, Inc.
Written by Ian Lance Taylor, Cygnus Support.
This file is part of GAS, the GNU Assembler.
void
md_assemble (char *str)
{
- char *s, *opcode_str;
+ char *s;
const struct i370_opcode *opcode;
i370_insn_t insn;
const unsigned char *opindex_ptr;
;
if (*s != '\0')
*s++ = '\0';
- opcode_str = str;
/* Look up the opcode in the hash table. */
opcode = (const struct i370_opcode *) hash_find (i370_hash, str);
for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
{
const struct i370_operand *operand;
- const char *errmsg;
char *hold;
expressionS ex;
operand = &i370_operands[*opindex_ptr];
- errmsg = NULL;
/* If this is an index operand, and we are skipping it,
just insert a zero. */
/* tc-i960.c - All the i80960-specific stuff
Copyright 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007, 2009
+ 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007, 2009, 2010
Free Software Foundation, Inc.
This file is part of GAS.
char opdesc; /* Operand descriptor byte. */
memS instr; /* Description of binary to be output. */
char *outP; /* Where the binary was output to. */
- expressionS expr; /* Parsed expression. */
+ expressionS exp; /* Parsed expression. */
/* ->description of deferred address fixup. */
fixS *fixP;
/* Parse the displacement; this must be done before emitting the
opcode, in case it is an expression using `.'. */
- parse_expr (instr.e, &expr);
+ parse_expr (instr.e, &exp);
/* Output opcode. */
outP = emit (instr.opcode);
return;
/* Process the displacement. */
- switch (expr.X_op)
+ switch (exp.X_op)
{
case O_illegal:
as_bad (_("expression syntax error"));
case O_constant:
if (instr.disp == 32)
- (void) emit (offs (expr)); /* Output displacement. */
+ (void) emit (offs (exp)); /* Output displacement. */
else
{
/* 12-bit displacement. */
- if (offs (expr) & ~0xfff)
+ if (offs (exp) & ~0xfff)
{
/* Won't fit in 12 bits: convert already-output
instruction to MEMB format, output
displacement. */
mema_to_memb (outP);
- (void) emit (offs (expr));
+ (void) emit (offs (exp));
}
else
{
/* WILL fit in 12 bits: OR into opcode and
overwrite the binary we already put out. */
- instr.opcode |= offs (expr);
+ instr.opcode |= offs (exp);
md_number_to_chars (outP, instr.opcode, 4);
}
}
outP = emit ((long) 0);
fixP = fix_new_exp (frag_now,
outP - frag_now->fr_literal,
- 4, & expr, 0, NO_RELOC);
+ 4, &exp, 0, NO_RELOC);
/* Steve's linker relaxing hack. Mark this 32-bit relocation as
being in the instruction stream, specifically as part of a callx
instruction. */
char buf[20];
/* Where the binary was output to. */
char *p;
- /* Pointer to description of deferred address fixup. */
- fixS *fixP;
if (!instrument_branches)
return;
{
sprintf (buf, "%s%d", BR_LABEL_BASE, i);
p = emit (0);
- fixP = fix_new (frag_now,
- p - frag_now->fr_literal,
- 4, symbol_find (buf), 0, 0, NO_RELOC);
+ fix_new (frag_now,
+ p - frag_now->fr_literal,
+ 4, symbol_find (buf), 0, 0, NO_RELOC);
}
}
/* tc-iq2000.c -- Assembler for the Sitera IQ2000.
- Copyright (C) 2003, 2004, 2005, 2006, 2007, 2009
+ Copyright (C) 2003, 2004, 2005, 2006, 2007, 2009, 2010
Free Software Foundation. Inc.
This file is part of GAS, the GNU Assembler.
static void
s_iq2000_ent (int aent)
{
- int number = 0;
symbolS *symbolP;
int maybe_text;
input_line_pointer++;
SKIP_WHITESPACE ();
if (ISDIGIT (*input_line_pointer) || *input_line_pointer == '-')
- number = get_number ();
+ get_number ();
if ((bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE) != 0)
maybe_text = 1;
/* tc-m32c.c -- Assembler for the Renesas M32C.
- Copyright (C) 2005, 2006, 2007, 2008, 2009 Free Software Foundation.
+ Copyright (C) 2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation.
Contributed by RedHat.
This file is part of GAS, the GNU Assembler.
last_insn_had_delay_slot
= CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_DELAY_SLOT);
+ (void) last_insn_had_delay_slot;
insn_size = CGEN_INSN_BITSIZE(insn.insn);
rl_type = rl_for (insn);
{
int addend;
int operand;
- int new_insn;
int where = fragP->fr_opcode - fragP->fr_literal;
int rl_where = fragP->fr_opcode - fragP->fr_literal;
unsigned char *op = (unsigned char *)fragP->fr_opcode;
- int op_base = 0;
- int op_op = 0;
int rl_addend = 0;
addend = target_address_for (fragP) - (fragP->fr_address + where);
- new_insn = subtype_mappings[fragP->fr_subtype].insn;
fragP->fr_fix = where + subtype_mappings[fragP->fr_subtype].bytes;
- op_base = 0;
-
switch (subtype_mappings[fragP->fr_subtype].insn)
{
case M32C_INSN_JCND16_5:
op[1] = addend - 1;
operand = M32C_OPERAND_LAB_8_8;
- op_op = 1;
rl_addend = 0x21;
break;
op[4] = (addend - 3) >> 8;
operand = M32C_OPERAND_LAB_8_16;
where += 2;
- new_insn = M32C_INSN_JMP16_W;
- op_base = 2;
- op_op = 3;
rl_addend = 0x51;
break;
op[2] = 0xfc;
operand = M32C_OPERAND_LAB_8_24;
where += 2;
- new_insn = M32C_INSN_JMP16_A;
- op_base = 2;
- op_op = 3;
rl_addend = 0x61;
break;
case M32C_INSN_JCND16:
op[2] = addend - 2;
operand = M32C_OPERAND_LAB_16_8;
- op_base = 0;
- op_op = 2;
rl_addend = 0x31;
break;
op[5] = (addend - 4) >> 8;
operand = M32C_OPERAND_LAB_8_16;
where += 3;
- new_insn = M32C_INSN_JMP16_W;
- op_base = 3;
- op_op = 4;
rl_addend = 0x61;
break;
op[3] = 0xfc;
operand = M32C_OPERAND_LAB_8_24;
where += 3;
- new_insn = M32C_INSN_JMP16_A;
- op_base = 3;
- op_op = 4;
rl_addend = 0x71;
break;
case M32C_INSN_JMP16_S:
op[0] = 0x60 | ((addend-2) & 0x07);
operand = M32C_OPERAND_LAB_5_3;
- op_base = 0;
- op_op = 0;
rl_addend = 0x10;
break;
op[0] = 0xfe;
op[1] = addend - 1;
operand = M32C_OPERAND_LAB_8_8;
- op_base = 0;
- op_op = 1;
rl_addend = 0x21;
break;
op[1] = addend - 1;
op[2] = (addend - 1) >> 8;
operand = M32C_OPERAND_LAB_8_16;
- op_base = 0;
- op_op = 1;
rl_addend = 0x31;
break;
op[2] = 0;
op[3] = 0;
operand = M32C_OPERAND_LAB_8_24;
- op_base = 0;
- op_op = 1;
rl_addend = 0x41;
break;
case M32C_INSN_JCND32:
op[1] = addend - 1;
operand = M32C_OPERAND_LAB_8_8;
- op_base = 0;
- op_op = 1;
rl_addend = 0x21;
break;
op[4] = (addend - 3) >> 8;
operand = M32C_OPERAND_LAB_8_16;
where += 2;
- new_insn = M32C_INSN_JMP32_W;
- op_base = 2;
- op_op = 3;
rl_addend = 0x51;
break;
op[2] = 0xcc;
operand = M32C_OPERAND_LAB_8_24;
where += 2;
- new_insn = M32C_INSN_JMP32_A;
- op_base = 2;
- op_op = 3;
rl_addend = 0x61;
break;
-
-
case M32C_INSN_JMP32_S:
addend = ((addend-2) & 0x07);
op[0] = 0x4a | (addend & 0x01) | ((addend << 3) & 0x30);
operand = M32C_OPERAND_LAB32_JMP_S;
- op_base = 0;
- op_op = 0;
rl_addend = 0x10;
break;
op[0] = 0xbb;
op[1] = addend - 1;
operand = M32C_OPERAND_LAB_8_8;
- op_base = 0;
- op_op = 1;
rl_addend = 0x21;
break;
op[1] = addend - 1;
op[2] = (addend - 1) >> 8;
operand = M32C_OPERAND_LAB_8_16;
- op_base = 0;
- op_op = 1;
rl_addend = 0x31;
break;
op[2] = 0;
op[3] = 0;
operand = M32C_OPERAND_LAB_8_24;
- op_base = 0;
- op_op = 1;
rl_addend = 0x41;
break;
op[1] = addend - 1;
op[2] = (addend - 1) >> 8;
operand = M32C_OPERAND_LAB_8_16;
- op_base = 0;
- op_op = 1;
rl_addend = 0x31;
break;
op[2] = 0;
op[3] = 0;
operand = M32C_OPERAND_LAB_8_24;
- op_base = 0;
- op_op = 1;
rl_addend = 0x41;
break;
op[1] = addend - 1;
op[2] = (addend - 1) >> 8;
operand = M32C_OPERAND_LAB_8_16;
- op_base = 0;
- op_op = 1;
rl_addend = 0x31;
break;
op[2] = 0;
op[3] = 0;
operand = M32C_OPERAND_LAB_8_24;
- op_base = 0;
- op_op = 1;
rl_addend = 0x41;
break;
operand = M32C_OPERAND_LAB_40_8;
break;
-
default:
printf("\nHey! Need more opcode converters! missing: %d %s\n\n",
fragP->fr_subtype,
|| (m32c_relax && (operand != M32C_OPERAND_LAB_5_3
&& operand != M32C_OPERAND_LAB32_JMP_S)))
{
- fixS *fixP;
gas_assert (fragP->fr_cgen.insn != 0);
- fixP = gas_cgen_record_fixup (fragP,
- where,
- fragP->fr_cgen.insn,
- (fragP->fr_fix - where) * 8,
- cgen_operand_lookup_by_num (gas_cgen_cpu_desc,
- operand),
- fragP->fr_cgen.opinfo,
- fragP->fr_symbol, fragP->fr_offset);
+ gas_cgen_record_fixup (fragP,
+ where,
+ fragP->fr_cgen.insn,
+ (fragP->fr_fix - where) * 8,
+ cgen_operand_lookup_by_num (gas_cgen_cpu_desc,
+ operand),
+ fragP->fr_cgen.opinfo,
+ fragP->fr_symbol,
+ fragP->fr_offset);
}
}
\f
/* tc-m68hc11.c -- Assembler code for the Motorola 68HC11 & 68HC12.
- Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009
+ Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010
Free Software Foundation, Inc.
Written by Stephane Carrez (stcarrez@nerim.fr)
}
else if (oper->X_op != O_register)
{
- fixS *fixp;
-
/* Now create a 24-bit fixup. */
- fixp = fix_new_exp (frag_now, f - frag_now->fr_literal, 3,
- oper, FALSE, BFD_RELOC_M68HC11_24);
+ fix_new_exp (frag_now, f - frag_now->fr_literal, 3,
+ oper, FALSE, BFD_RELOC_M68HC11_24);
number_to_chars_bigendian (f, 0, 3);
}
else
unsigned char code;
char *f;
unsigned long n;
- fragS *frag;
- int where;
/* The relative branch conversion is not supported for
brclr and brset. */
&& (!check_range (n, opcode->format) &&
(jmp_mode == 1 || flag_fixed_branches == 0))))
{
- frag = frag_now;
- where = frag_now_fix ();
-
fix_new (frag_now, frag_now_fix (), 0,
&abs_symbol, 0, 1, BFD_RELOC_M68HC11_RL_JUMP);
}
else if (opcode->format & M6812_OP_JUMP_REL16)
{
- frag = frag_now;
- where = frag_now_fix ();
-
fix_new (frag_now, frag_now_fix (), 0,
&abs_symbol, 0, 1, BFD_RELOC_M68HC11_RL_JUMP);
{
char *op;
- frag = frag_now;
- where = frag_now_fix ();
-
fix_new (frag_now, frag_now_fix (), 0,
&abs_symbol, 0, 1, BFD_RELOC_M68HC11_RL_JUMP);
}
else
{
- fixS* fixp;
-
fragP->fr_opcode[0] = fragP->fr_opcode[0] << 3;
fragP->fr_opcode[0] |= 0xe2;
- fixp = fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
- fragP->fr_offset, 1, BFD_RELOC_16_PCREL);
+ fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
+ fragP->fr_offset, 1, BFD_RELOC_16_PCREL);
fragP->fr_fix += 2;
}
break;
{
char *where;
long value = * valP;
- int op_type;
if (fixP->fx_addsy == (symbolS *) NULL)
fixP->fx_done = 1;
if (fixP->fx_subsy != (symbolS *) NULL)
as_bad_where (fixP->fx_file, fixP->fx_line, _("Expression too complex."));
- op_type = fixP->fx_r_type;
-
/* Patch the instruction with the resolved operand. Elf relocation
info will also be generated to take care of linker/loader fixups.
The 68HC11 addresses only 64Kb, we are only concerned by 8 and 16-bit
/* tc-m68k.c -- Assemble for the m68k family
Copyright 1987, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
- 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
{
const char *default_cpu = TARGET_CPU;
int i;
- unsigned int default_arch;
/* Get the canonical name for the default target CPU. */
if (*default_cpu == 'm')
{
if (strcasecmp (default_cpu, m68k_cpus[i].name) == 0)
{
- default_arch = m68k_cpus[i].arch;
while (m68k_cpus[i].alias > 0)
i--;
while (m68k_cpus[i].alias < 0)
/* tc-microblaze.c -- Assemble code for Xilinx MicroBlaze
- Copyright 2009 Free Software Foundation.
+ Copyright 2009, 2010 Free Software Foundation.
This file is part of GAS, the GNU Assembler.
offsetT size;
symbolS *symbolP;
offsetT align;
- segT old_sec;
- int old_subsec;
char *pfrag;
int align2;
segT current_seg = now_seg;
}
/* Allocate_bss. */
- old_sec = now_seg;
- old_subsec = now_subseg;
if (align)
{
/* Convert to a power of 2 alignment. */
fixP = fix_new (fragP, fragP->fr_fix, INST_WORD_SIZE * 2, fragP->fr_symbol,
fragP->fr_offset, TRUE, BFD_RELOC_MICROBLAZE_64_PLT);
/* fixP->fx_plt = 1; */
+ (void) fixP;
fragP->fr_fix += INST_WORD_SIZE * 2;
fragP->fr_var = 0;
break;
section_alignment = get_absolute_expression ();
else
section_alignment = 0;
+ /* FIXME: really ignore? */
+ (void) section_alignment;
section_name = xstrdup (section_name);
{
segT saved_seg = now_seg;
subsegT saved_subseg = now_subseg;
- valueT dot;
expressionS exp;
char *fragp;
- dot = frag_now_fix ();
-
#ifdef md_flush_pending_output
md_flush_pending_output ();
#endif
/* tc-mmix.c -- Assembler for Don Knuth's MMIX.
- Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
Free Software Foundation.
This file is part of GAS, the GNU Assembler.
mmix_byte (void)
{
unsigned int c;
- char *start;
if (now_seg == text_section)
text_has_contents = 1;
{
case '\"':
++input_line_pointer;
- start = input_line_pointer;
while (is_a_char (c = next_char_of_string ()))
{
FRAG_APPEND_1_CHAR (c);
mmix_cons (int nbytes)
{
expressionS exp;
- char *start;
/* If we don't have any contents, then it's ok to have a specified start
address that is not a multiple of the max data size. We will then
bytes. */
case '\"':
++input_line_pointer;
- start = input_line_pointer;
while (is_a_char (c = next_char_of_string ()))
{
exp.X_op = O_constant;
/* tc-mn10300.c -- Assembler code for the Matsushita 10300
Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
- 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+ 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
{
reloc_howto_type *reloc_howto;
int offset;
- fixS *fixP;
reloc_howto = bfd_reloc_type_lookup (stdoutput,
fixups[i].reloc);
abort ();
offset = 4 - size;
- fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
- reloc_size, &fixups[i].exp,
- reloc_howto->pc_relative,
- fixups[i].reloc);
+ fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
+ reloc_size, &fixups[i].exp,
+ reloc_howto->pc_relative,
+ fixups[i].reloc);
}
else
{
/* tc-msp430.c -- Assembler code for the Texas Instruments MSP430
- Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2009
+ Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010
Free Software Foundation, Inc.
Contributed by Dmitry Diky <diwil@mail.ru>
static char *
extract_word (char * from, char * to, int limit)
{
- char *op_start;
char *op_end;
int size = 0;
*to = 0;
/* Find the op code end. */
- for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
+ for (op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
{
to[size++] = *op_end++;
if (size + 1 >= limit)
/* tc-mt.c -- Assembler for the Morpho Technologies mt .
- Copyright (C) 2005, 2006, 2007 Free Software Foundation.
+ Copyright (C) 2005, 2006, 2007, 2010 Free Software Foundation.
This file is part of GAS, the GNU Assembler.
last_insn_had_delay_slot =
CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_DELAY_SLOT);
+ (void) last_insn_had_delay_slot;
last_insn_has_load_delay =
CGEN_INSN_ATTR_VALUE (insn.insn, CGEN_INSN_LOAD_DELAY);
bfd_boolean
mt_fix_adjustable (fixS * fixP)
{
- bfd_reloc_code_real_type reloc_type;
-
if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
{
const CGEN_INSN *insn = NULL;
const CGEN_OPERAND *operand;
operand = cgen_operand_lookup_by_num(gas_cgen_cpu_desc, opindex);
- reloc_type = md_cgen_lookup_reloc (insn, operand, fixP);
+ md_cgen_lookup_reloc (insn, operand, fixP);
}
- else
- reloc_type = fixP->fx_r_type;
if (fixP->fx_addsy == NULL)
return TRUE;
/* Assembly backend for the OpenRISC 1000.
- Copyright (C) 2002, 2003, 2005, 2007, 2009
+ Copyright (C) 2002, 2003, 2005, 2007, 2009, 2010
Free Software Foundation, Inc.
Contributed by Damjan Lampret <lampret@opencores.org>.
Modified bu Johan Rydberg, <johan.rydberg@netinsight.se>.
char *s;
const char *args;
const struct machine_opcode *insn;
- char *argsStart;
unsigned long opcode;
expressionS the_operand;
expressionS *operand = &the_operand;
return;
}
- argsStart = s;
opcode = 0;
memset (&the_insn, '\0', sizeof (the_insn));
the_insn.reloc = BFD_RELOC_NONE;
/* tc-pj.c -- Assemble code for Pico Java
- Copyright 1999, 2000, 2001, 2002, 2003, 2005, 2007, 2009
+ Copyright 1999, 2000, 2001, 2002, 2003, 2005, 2007, 2009, 2010
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
long val = *valP;
long max, min;
- int shift;
max = min = 0;
- shift = 0;
switch (fixP->fx_r_type)
{
case BFD_RELOC_VTABLE_INHERIT:
/* tc-s390.c -- Assemble for the S390
Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
- 2009 Free Software Foundation, Inc.
+ 2009, 2010 Free Software Foundation, Inc.
Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com).
This file is part of GAS, the GNU Assembler.
elf_suffix_type suffix;
bfd_reloc_code_real_type reloc;
int skip_optional;
- int parentheses;
char *f;
int fc, i;
while (ISSPACE (*str))
str++;
- parentheses = 0;
skip_optional = 0;
/* Gather the operands. */
accommodate the insns seen so far. */
static unsigned int valid_arch;
+#ifdef OBJ_ELF
/* Whether --fdpic was given. */
static int sh_fdpic;
+#endif
const char EXP_CHARS[] = "eE";
int low_byte = target_big_endian ? 1 : 0;
int max_index = 4;
bfd_reloc_code_real_type r_type;
+#ifdef OBJ_ELF
int unhandled_pic = 0;
+#endif
nbuf[0] = 0;
nbuf[1] = 0;
nbuf[6] = 0;
nbuf[7] = 0;
+#ifdef OBJ_ELF
for (indx = 0; indx < 3; indx++)
if (opcode->arg[indx] == A_IMM
&& operand[indx].type == A_IMM
|| sh_PIC_related_p (operand[indx].immediate.X_add_symbol)
|| sh_PIC_related_p (operand[indx].immediate.X_op_symbol)))
unhandled_pic = 1;
+#endif
if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32))
{
break;
case IMM0_20:
r_type = BFD_RELOC_SH_DISP20;
+#ifdef OBJ_ELF
if (sh_check_fixup (&operand->immediate, &r_type))
as_bad (_("Invalid PIC expression."));
unhandled_pic = 0;
+#endif
insert4 (output, r_type, 0, operand);
break;
case IMM0_20BY8:
}
}
}
+#ifdef OBJ_ELF
if (unhandled_pic)
as_bad (_("misplaced PIC operand"));
+#endif
if (!target_big_endian)
{
output[1] = (nbuf[0] << 4) | (nbuf[1]);
sh_cons_align (int nbytes)
{
int nalign;
- char *p;
if (sh_no_align_cons)
{
return;
}
- p = frag_var (rs_align_test, 1, 1, (relax_substateT) 0,
- (symbolS *) NULL, (offsetT) nalign, (char *) NULL);
+ frag_var (rs_align_test, 1, 1, (relax_substateT) 0,
+ (symbolS *) NULL, (offsetT) nalign, (char *) NULL);
record_alignment (now_seg, nalign);
}
/* tc-sparc.c -- Assemble for the SPARC
Copyright 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
sparc_cons_align (int nbytes)
{
int nalign;
- char *p;
/* Only do this if we are enforcing aligned data. */
if (! enforce_aligned_data)
return;
}
- p = frag_var (rs_align_test, 1, 1, (relax_substateT) 0,
- (symbolS *) NULL, (offsetT) nalign, (char *) NULL);
+ frag_var (rs_align_test, 1, 1, (relax_substateT) 0,
+ (symbolS *) NULL, (offsetT) nalign, (char *) NULL);
record_alignment (now_seg, nalign);
}
/* tc-tic4x.c -- Assemble for the Texas Instruments TMS320C[34]x.
- Copyright (C) 1997,1998, 2002, 2003, 2005, 2006, 2007, 2008, 2009
+ Copyright (C) 1997,1998, 2002, 2003, 2005, 2006, 2007, 2008, 2009, 2010
Free Software Foundation. Inc.
Contributed by Michael P. Hayes (m.hayes@elec.canterbury.ac.nz)
}
name = input_line_pointer;
c = get_symbol_end (); /* Get terminator. */
- demand_empty_rest_of_line ();
tic4x_insert_sym (name, value);
+ *input_line_pointer++ = c;
+ demand_empty_rest_of_line ();
}
/* Reset local labels. */
{
char c;
char *section_name;
- char *subsection_name;
char *name;
segT seg;
offsetT num;
Volker Kuhlmann <v.kuhlmann@elec.canterbury.ac.nz>. */
if (c == ':')
{
- subsection_name = input_line_pointer;
c = get_symbol_end (); /* Get terminator. */
input_line_pointer++; /* Skip null symbol terminator. */
as_warn (_(".sect: subsection name ignored"));
/* tc-tic54x.c -- Assembly code for the Texas Instruments TMS320C54X
Copyright 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
- 2009 Free Software Foundation, Inc.
+ 2009, 2010 Free Software Foundation, Inc.
Contributed by Timothy Wall (twall@cygnus.com)
This file is part of GAS, the GNU Assembler.
tic54x_stringer (int type)
{
unsigned int c;
- char *start;
int append_zero = type == 'S' || type == 'P';
int packed = type == 'p' || type == 'P';
int last_char = -1; /* Packed strings need two bytes at a time to encode. */
}
case '\"':
++input_line_pointer; /* -> 1st char of string. */
- start = input_line_pointer;
while (is_a_char (c = next_char_of_string ()))
{
if (!packed)
/* tc-vax.c - vax-specific -
Copyright 1987, 1991, 1992, 1993, 1994, 1995, 1998, 2000, 2001, 2002,
- 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
get the types wrong below, we lose at compile time rather than at
lint or run time. */
char access_mode; /* vop_access. */
- char width; /* vop_width. */
access_mode = vopP->vop_access;
- width = vopP->vop_width;
/* None of our code bugs (yet), no user text errors, no warnings
even. */
err = wrn = 0;
/* tc-xstormy16.c -- Assembler for the Sanyo XSTORMY16.
- Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009
+ Copyright 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2009, 2010
Free Software Foundation.
This file is part of GAS, the GNU Assembler.
expressionS *exp)
{
bfd_reloc_code_real_type code;
- fixS *fix;
if (exp->X_op == O_fptr_symbol)
{
return;
}
- fix = fix_new_exp (f, where, nbytes, exp, 0, code);
+ fix_new_exp (f, where, nbytes, exp, 0, code);
}
/* Called while parsing an instruction to create a fixup.
/* tc-xtensa.c -- Assemble Xtensa instructions.
- Copyright 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ Copyright 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
md_flush_pending_output ();
- switch (end_directive)
+ switch ((int) end_directive)
{
- case (directiveE) XTENSA_UNDEFINED:
+ case XTENSA_UNDEFINED:
discard_rest_of_line ();
return;
- case directive_density:
+ case (int) directive_density:
as_warn (_(".end [no-]density is ignored"));
demand_empty_rest_of_line ();
break;
- case directive_absolute_literals:
+ case (int) directive_absolute_literals:
if (!absolute_literals_supported && !end_negated)
{
as_warn (_("Xtensa absolute literals option not supported; ignored"));
if (use_literal_section || directive_state[directive_absolute_literals])
dest_seg = now_seg;
+ /* FIXME, despite the previous comments, dest_seg is unused... */
+ (void) dest_seg;
+
/* All literals are aligned to four-byte boundaries. */
frag_align (2, 0, 0);
record_alignment (now_seg, 2);
bfd_reloc_code_real_type reloc;
char *old_input_line_pointer;
expressionS *tok = &orig_insn.extra_arg;
- segT t;
old_input_line_pointer = input_line_pointer;
input_line_pointer = arg_strings[num_args - 1];
- t = expression (tok);
+ expression (tok);
if (tok->X_op == O_symbol
&& ((reloc = xtensa_elf_suffix (&input_line_pointer, tok))
== BFD_RELOC_XTENSA_TLS_CALL))
for (frchP = seg_info (s)->frchainP; frchP; frchP = frchP->frch_next)
{
fragS *fragP;
- fragS *current_target = NULL;
xtensa_opcode current_opcode = XTENSA_UNDEFINED;
/* Walk over all of the fragments in a subsection. */
TInsn t_insn;
fragS *loop_frag = next_non_empty_frag (fragP);
tinsn_from_chars (&t_insn, loop_frag->fr_opcode, 0);
- current_target = symbol_get_frag (fragP->fr_symbol);
current_opcode = t_insn.opcode;
gas_assert (xtensa_opcode_is_loop (xtensa_default_isa,
current_opcode) == 1);
symbolS *gen_label = NULL;
offsetT frag_offset;
bfd_boolean first = TRUE;
- bfd_boolean last_is_jump;
/* It does not fit. Find something that does and
convert immediately. */
total_size = 0;
first = TRUE;
- last_is_jump = FALSE;
for (i = 0; i < istack.ninsn; i++)
{
TInsn *tinsn = &istack.insn[i];
{
seg_list *segment;
frchainS *frchain_from, *frchain_to;
- fragS *search_frag, *next_frag, *last_frag, *literal_pool, *insert_after;
+ fragS *search_frag, *next_frag, *literal_pool, *insert_after;
fragS **frag_splice;
emit_state state;
segT dest_seg;
frags in it. */
frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
xtensa_set_frag_assembly_state (frag_now);
- last_frag = frag_now;
frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
xtensa_set_frag_assembly_state (frag_now);
/* ECOFF debugging support.
Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
- 2003, 2004, 2005, 2006, 2007, 2008, 2009
+ 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
Free Software Foundation, Inc.
Contributed by Cygnus Support.
This file was put together by Ian Lance Taylor <ian@cygnus.com>. A
ty = add_aux_sym_tir (&last_func_type_info,
hash_no,
&cur_file_ptr->thash_head[0]);
-
+ (void) ty;
/* This seems to be unnecessary. I'm not even sure what it is
* intended to do. It's from mips-tfile.
* if (last_func_sym_value != (symbolS *) NULL)
/* itbl-ops.c
Copyright 1997, 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007,
- 2009 Free Software Foundation, Inc.
+ 2009, 2010 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
{
struct ITBL_OPCODE_STRUCT *new_opcodes, *o;
struct itbl_entry *e, **es;
- int n, id, size, new_size, new_num_opcodes;
+ int n, size, new_size, new_num_opcodes;
+#ifdef USE_MACROS
+ int id;
+#endif
if (!itbl_have_entries)
return;
/* FIXME! some NUMOPCODES are calculated expressions.
These need to be changed before itbls can be supported. */
+#ifdef USE_MACROS
id = ITBL_NUM_MACROS; /* begin the next macro id after the last */
+#endif
o = &new_opcodes[ITBL_NUM_OPCODES]; /* append macro to opcodes list */
for (n = e_p0; n < e_nprocs; n++)
{
static int
debugging_pseudo (list_info_type *list, const char *line)
{
+#ifdef OBJ_ELF
static int in_debug;
int was_debug;
+#endif
if (list->debugging)
{
+#ifdef OBJ_ELF
in_debug = 1;
+#endif
return 1;
}
-
+#ifdef OBJ_ELF
was_debug = in_debug;
in_debug = 0;
+#endif
while (ISSPACE (*line))
line++;
#ifdef S_SET_ALIGN
if (align != 0)
S_SET_ALIGN (sym, align);
+#else
+ (void) align;
#endif
if (line_label != NULL)
const int bitsize = bits_appendzero & ~7;
const int append_zero = bits_appendzero & 1;
unsigned int c;
+#if !defined(NO_LISTING) && defined (OBJ_ELF)
char *start;
+#endif
#ifdef md_flush_pending_output
md_flush_pending_output ();
{
case '\"':
++input_line_pointer; /*->1st char of string. */
+#if !defined(NO_LISTING) && defined (OBJ_ELF)
start = input_line_pointer;
+#endif
while (is_a_char (c = next_char_of_string ()))
stringer_append_char (c, bitsize);
know (input_line_pointer[-1] == '\"');
-#ifndef NO_LISTING
-#ifdef OBJ_ELF
+#if !defined(NO_LISTING) && defined (OBJ_ELF)
/* In ELF, when gcc is emitting DWARF 1 debugging output, it
will emit .string with a filename in the .debug section
after a sequence of constants. See the comment in
listing_source_file (start);
input_line_pointer[-1] = c;
}
-#endif
#endif
break;