(no commit message)

diff --git a/openpower/sv/svp_rewrite/svp64.mdwn b/openpower/sv/svp_rewrite/svp64.mdwn
index e07b7051744c44786f94c656eb2043de4ef0635a..72d387f78f745d8cec84d8112ae236949ffbad87 100644 (file)
--- a/openpower/sv/svp_rewrite/svp64.mdwn
+++ b/openpower/sv/svp_rewrite/svp64.mdwn
@@ -144,7 +144,7 @@ RM-2P-2S1D:
 
 Note that for 1S2P the EXTRA2 dest and src names are switched (Rsrc_EXTRA2 is in bits 8:9, Rdest1_EXTRA2 in 10:11)
 
-Note also that LD with update indexed, which takes 2 src and 2 dest (e.g. `lhaux RT,RA,RB`), does not have room for 4 registers and also Twin Prefication.  therefore these are treated as RM-2P-2S1D and the src spec for RA is also used for the same RA as a dest.
+Note also that LD with update indexed, which takes 2 src and 2 dest (e.g. `lhaux RT,RA,RB`), does not have room for 4 registers and also Twin Predication.  therefore these are treated as RM-2P-2S1D and the src spec for RA is also used for the same RA as a dest.
 
 ## R\*_EXTRA2 and R\*_EXTRA3 Encoding