(simplify_rtx, case SUBREG): Don't call force_to_mode.

(simplify_set): Call force_to_mode here.

From-SVN: r7216

diff --git a/gcc/combine.c b/gcc/combine.c
index 41c83dc39613cc7fbae1b3012cc2c5474e4715e2..32010967c50bc5a70013c59ec44c0ebb1a71644c 100644 (file)
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -3260,16 +3260,10 @@ simplify_rtx (x, op0_mode, last, in_dest)
          && GET_MODE_SIZE (mode) > GET_MODE_SIZE (op0_mode))
        return SUBREG_REG (x);
 
-      /* If we are narrowing an integral object, we need to see if we can
-        simplify the expression for the object knowing that we only need the
-        low-order bits.  */
+      /* Note that we cannot do any narrowing for non-constants since
+        we might have been counting on using the fact that some bits were
+        zero.  We now do this in the SET.  */
 
-      if (GET_MODE_CLASS (mode) == MODE_INT
-         && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
-         && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
-         && subreg_lowpart_p (x))
-       return force_to_mode (SUBREG_REG (x), mode, GET_MODE_MASK (mode),
-                             NULL_RTX, 0);
       break;
 
     case NOT:
@@ -4201,6 +4195,13 @@ simplify_set (x)
   if (GET_CODE (dest) == PC && GET_CODE (src) == RETURN)
     return src;
 
+  /* Now that we know for sure which bits of SRC we are using, see if we can
+     simplify the expression for the object knowing that we only need the
+     low-order bits.  */
+
+  if (GET_MODE_CLASS (mode) == MODE_INT)
+    src = force_to_mode (src, mode, GET_MODE_MASK (mode), NULL_RTX, 0);
+
   /* Convert this into a field assignment operation, if possible.  */
   x = make_field_assignment (x);