radv/gfx9: implement coherent shaders for VK_ACCESS_SHADER_READ_BIT
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Fri, 27 Jul 2018 14:14:28 +0000 (16:14 +0200)
committerSamuel Pitoiset <samuel.pitoiset@gmail.com>
Thu, 23 Aug 2018 13:42:56 +0000 (15:42 +0200)
Single-sample color and single-sample depth (not stencil)
are coherent with shaders.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl
src/amd/vulkan/radv_cmd_buffer.c

index 52c943f302a760cde913dfae8ea8e2613b47073d..2d6609887377a056a2875eeff139d7125b2fb858 100644 (file)
@@ -2022,6 +2022,7 @@ radv_dst_access_flush(struct radv_cmd_buffer *cmd_buffer,
        bool flush_CB_meta = true, flush_DB_meta = true;
        enum radv_cmd_flush_bits flush_bits = 0;
        bool flush_CB = true, flush_DB = true;
+       bool image_is_coherent = false;
        uint32_t b;
 
        if (image) {
@@ -2034,6 +2035,19 @@ radv_dst_access_flush(struct radv_cmd_buffer *cmd_buffer,
                        flush_CB_meta = false;
                if (!radv_image_has_htile(image))
                        flush_DB_meta = false;
+
+               if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) {
+                       if (image->info.samples == 1 &&
+                           (image->usage & (VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT |
+                                            VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT)) &&
+                           !vk_format_is_stencil(image->vk_format)) {
+                               /* Single-sample color and single-sample depth
+                                * (not stencil) are coherent with shaders on
+                                * GFX9.
+                                */
+                               image_is_coherent = true;
+                       }
+               }
        }
 
        for_each_bit(b, dst_flags) {
@@ -2045,12 +2059,17 @@ radv_dst_access_flush(struct radv_cmd_buffer *cmd_buffer,
                        flush_bits |= RADV_CMD_FLAG_INV_VMEM_L1 | RADV_CMD_FLAG_INV_SMEM_L1;
                        break;
                case VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT:
-               case VK_ACCESS_SHADER_READ_BIT:
                case VK_ACCESS_TRANSFER_READ_BIT:
                case VK_ACCESS_INPUT_ATTACHMENT_READ_BIT:
                        flush_bits |= RADV_CMD_FLAG_INV_VMEM_L1 |
                                      RADV_CMD_FLAG_INV_GLOBAL_L2;
                        break;
+               case VK_ACCESS_SHADER_READ_BIT:
+                       flush_bits |= RADV_CMD_FLAG_INV_VMEM_L1;
+
+                       if (!image_is_coherent)
+                               flush_bits |= RADV_CMD_FLAG_INV_GLOBAL_L2;
+                       break;
                case VK_ACCESS_COLOR_ATTACHMENT_READ_BIT:
                        if (flush_CB)
                                flush_bits |= RADV_CMD_FLAG_FLUSH_AND_INV_CB;