RISC-V: Make g imply zmmul extension.

bfd/
	* elfxx-riscv.c (riscv_implicit_subset): Moved entry of m after g,
	so that g can imply zmmul.
gas/
	* testsuite/gas/riscv/attribute-01.d: Updated.
	* testsuite/gas/riscv/attribute-02.d: Likewise.
	* testsuite/gas/riscv/attribute-03.d: Likewise.
	* testsuite/gas/riscv/attribute-04.d: Likewise.
	* testsuite/gas/riscv/attribute-05.d: Likewise.
	* testsuite/gas/riscv/attribute-10.d: Likewise.
	* testsuite/gas/riscv/march-imply-g.d: Likewise.
	* testsuite/gas/riscv/march-imply-unsupported.d: Likewise.

diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index 8cb3c8d49302f6799d502380d9386af4038bd523..e03b312a381ba533ec880ad030267155a392c414 100644 (file)
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1039,7 +1039,6 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
   {"e", "i",           check_implicit_always},
   {"i", "zicsr",       check_implicit_for_i},
   {"i", "zifencei",    check_implicit_for_i},
-  {"m", "zmmul",       check_implicit_always},
   {"g", "i",           check_implicit_always},
   {"g", "m",           check_implicit_always},
   {"g", "a",           check_implicit_always},
@@ -1047,6 +1046,7 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
   {"g", "d",           check_implicit_always},
   {"g", "zicsr",       check_implicit_always},
   {"g", "zifencei",    check_implicit_always},
+  {"m", "zmmul",       check_implicit_always},
   {"q", "d",           check_implicit_always},
   {"v", "d",           check_implicit_always},
   {"v", "zve64d",      check_implicit_always},

diff --git a/gas/testsuite/gas/riscv/attribute-01.d b/gas/testsuite/gas/riscv/attribute-01.d
index 2e19e09abf29eb413af405917e1aa76a4f3ec748..612305765abd0ccdca73dc62f4533dd75b8fe0d2 100644 (file)
--- a/gas/testsuite/gas/riscv/attribute-01.d
+++ b/gas/testsuite/gas/riscv/attribute-01.d
@@ -3,4 +3,4 @@
 #source: empty.s
 Attribute Section: riscv
 File Attributes
-  Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0"
+  Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_zmmul1p0"

diff --git a/gas/testsuite/gas/riscv/attribute-02.d b/gas/testsuite/gas/riscv/attribute-02.d
index 45b89f2d62d095067996b13648cf2875612a760b..324fd9f217113cc3f73f6468df9dc35141237a86 100644 (file)
--- a/gas/testsuite/gas/riscv/attribute-02.d
+++ b/gas/testsuite/gas/riscv/attribute-02.d
@@ -3,4 +3,4 @@
 #source: empty.s
 Attribute Section: riscv
 File Attributes
-  Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_xargle2p0"
+  Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_zmmul1p0_xargle2p0"

diff --git a/gas/testsuite/gas/riscv/attribute-03.d b/gas/testsuite/gas/riscv/attribute-03.d
index 11416d63d2548834859bb62227d6e59c42a0f276..6e1c2fbc592d9ccf8e09f17c16fd79f51e8b496d 100644 (file)
--- a/gas/testsuite/gas/riscv/attribute-03.d
+++ b/gas/testsuite/gas/riscv/attribute-03.d
@@ -3,4 +3,4 @@
 #source: empty.s
 Attribute Section: riscv
 File Attributes
-  Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_xargle2p0_xfoo3p0"
+  Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_zmmul1p0_xargle2p0_xfoo3p0"

diff --git a/gas/testsuite/gas/riscv/attribute-04.d b/gas/testsuite/gas/riscv/attribute-04.d
index 408464d01ce07673b8a6e2f1d4711558311e6b55..f64494a798deaaf51d3fb92c2e3a9e7178fd6ae1 100644 (file)
--- a/gas/testsuite/gas/riscv/attribute-04.d
+++ b/gas/testsuite/gas/riscv/attribute-04.d
@@ -3,4 +3,4 @@
 #source: attribute-04.s
 Attribute Section: riscv
 File Attributes
-  Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0"
+  Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_zmmul1p0"

diff --git a/gas/testsuite/gas/riscv/attribute-05.d b/gas/testsuite/gas/riscv/attribute-05.d
index 247f52e0ed87259fc10e9ffc1ba724450fd03750..9507b43976dba8fb2f6658517c57a8a95b27b805 100644 (file)
--- a/gas/testsuite/gas/riscv/attribute-05.d
+++ b/gas/testsuite/gas/riscv/attribute-05.d
@@ -4,7 +4,7 @@
 Attribute Section: riscv
 File Attributes
   Tag_RISCV_stack_align: 16-bytes
-  Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0"
+  Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_zmmul1p0"
   Tag_RISCV_unaligned_access: Unaligned access
   Tag_RISCV_priv_spec: 1
   Tag_RISCV_priv_spec_minor: 9

diff --git a/gas/testsuite/gas/riscv/attribute-10.d b/gas/testsuite/gas/riscv/attribute-10.d
index 30b82d7207335d26774ddad25ff753ac29b44c48..f46692275f191caca26c482b27cfb59c1fe89d9f 100644 (file)
--- a/gas/testsuite/gas/riscv/attribute-10.d
+++ b/gas/testsuite/gas/riscv/attribute-10.d
@@ -3,4 +3,4 @@
 #source: empty.s
 Attribute Section: riscv
 File Attributes
-  Tag_RISCV_arch: "rv32i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_zicsr2p0_zifencei2p0"
+  Tag_RISCV_arch: "rv32i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_zicsr2p0_zifencei2p0_zmmul1p0"

diff --git a/gas/testsuite/gas/riscv/march-imply-g.d b/gas/testsuite/gas/riscv/march-imply-g.d
index 33a243d78d7264bcc4f34cb85d55e3efde4e8d0a..239b717fd7ff022c8929b461bcf65b1a43c60ec2 100644 (file)
--- a/gas/testsuite/gas/riscv/march-imply-g.d
+++ b/gas/testsuite/gas/riscv/march-imply-g.d
@@ -3,4 +3,4 @@
 #source: empty.s
 Attribute Section: riscv
 File Attributes
-  Tag_RISCV_arch: "rv32i2p1_m2p0_a2p1_f2p2_d2p2_zicsr2p0_zifencei2p0"
+  Tag_RISCV_arch: "rv32i2p1_m2p0_a2p1_f2p2_d2p2_zicsr2p0_zifencei2p0_zmmul1p0"

diff --git a/gas/testsuite/gas/riscv/march-imply-unsupported.d b/gas/testsuite/gas/riscv/march-imply-unsupported.d
index 2e19e09abf29eb413af405917e1aa76a4f3ec748..612305765abd0ccdca73dc62f4533dd75b8fe0d2 100644 (file)
--- a/gas/testsuite/gas/riscv/march-imply-unsupported.d
+++ b/gas/testsuite/gas/riscv/march-imply-unsupported.d
@@ -3,4 +3,4 @@
 #source: empty.s
 Attribute Section: riscv
 File Attributes
-  Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0"
+  Tag_RISCV_arch: "rv32i2p0_m2p0_a2p0_f2p0_d2p0_zmmul1p0"