void mir_rewrite_index_src_single(midgard_instruction *ins, unsigned old, unsigned new);
void mir_rewrite_index_src_tag(compiler_context *ctx, unsigned old, unsigned new, unsigned tag);
bool mir_single_use(compiler_context *ctx, unsigned value);
+bool mir_special_index(compiler_context *ctx, unsigned idx);
/* MIR printing */
return mir_nontrivial_mod(src2, is_int, ins->mask);
}
+/* Checks if an index will be used as a special register -- basically, if we're
+ * used as the input to a non-ALU op */
+bool
+mir_special_index(compiler_context *ctx, unsigned idx)
+{
+ mir_foreach_instr_global(ctx, ins) {
+ bool is_ldst = ins->type == TAG_LOAD_STORE_4;
+ bool is_tex = ins->type == TAG_TEXTURE_4;
+
+ if (!(is_ldst || is_tex))
+ continue;
+
+ if (mir_has_arg(ins, idx))
+ return true;
+ }
+
+ return false;
+}
ctx->uniform_cutoff = MAX2(ctx->uniform_cutoff, address + 1);
unsigned promoted = SSA_FIXED_REGISTER(uniform_reg);
- /* We do need the move for safety for a non-SSA dest */
+ /* We do need the move for safety for a non-SSA dest, or if
+ * we're being fed into a special class */
- if (ins->ssa_args.dest >= ctx->func->impl->ssa_alloc) {
+ bool needs_move = ins->ssa_args.dest >= ctx->func->impl->ssa_alloc;
+ needs_move |= mir_special_index(ctx, ins->ssa_args.dest);
+
+ if (needs_move) {
midgard_instruction mov = v_mov(promoted, blank_alu_src, ins->ssa_args.dest);
mir_insert_instruction_before(ins, mov);
} else {