{{get_override("script_after_synth")|default("# (script_after_synth placeholder)")}}
write_json {{name}}.json
""",
- "{{name}}_pre_pack.py": r"""
- # {{autogenerated}}
- {% for signal, frequency in platform.iter_clock_constraints() -%}
- {# Clock in MHz #}
- ctx.addClock("{{signal|hierarchy(".")}}", {{frequency/1000000}})
- {% endfor%}
- {{get_override("add_pre_pack")|default("# (add_pre_pack placeholder)")}}
- """,
"{{name}}.pcf": r"""
# {{autogenerated}}
{% for port_name, pin_name, attrs in platform.iter_port_constraints_bits() -%}
set_io {{port_name}} {{pin_name}}
{% endfor %}
+ {% for signal, frequency in platform.iter_clock_constraints() -%}
+ set_frequency "{{signal|hierarchy(".")}}" {{frequency/1000000}}
+ {% endfor%}
{{get_override("add_constraints")|default("# (add_constraints placeholder)")}}
""",
}