+2012-07-22 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/53961
+ * config/i386/i386.md (*lea): New insn pattern.
+ (*lea_1): Remove.
+ (*lea<mode>_2): Ditto.
+ (*lea_{3,4,5,6}_zext): Ditto.
+ * config/i386/constraints.md (j): Remove address constraint.
+ * config/i386/i386.c (ix86_decompose_address): Allow SImode subreg
+ of an address.
+ (ix86_print_operand_address): Handle SImode subreg of an address.
+ (ix86_avoid_lea_for_add): Reject zero-extended addresses for now.
+
2012-07-22 Hans-Peter Nilsson <hp@axis.com>
Emit executable-stack note correctly for CRIS targets.
mips_expand_ext_as_unaligned_load.
(mips_expand_ext_as_unaligned_load): Add unsigned_p argument.
Accept DImode dest when the width is that of SImode.
- * config/mips/mips.md (extv): Update call to
+ * config/mips/mips.md (extv): Update call to
mips_expand_ext_as_unaligned_load.
(extzv): Likewise.
New reservations.
* gcc/config/mips/10000.md, gcc/config/mips/20kc.md,
* gcc/config/mips/24k.md, gcc/config/mips/4130.md,
- * gcc/config/mips/4k.md, gcc/config/mips/5400.md,
+ * gcc/config/mips/4k.md, gcc/config/mips/5400.md,
* gcc/config/mips/5500.md, gcc/config/mips/5k.md,
- * gcc/config/mips/7000.md, gcc/config/mips/74k.md,
+ * gcc/config/mips/7000.md, gcc/config/mips/74k.md,
* gcc/config/mips/9000.md, gcc/config/mips/loongson2ef.md,
* gcc/config/mips/loongson3a.md, gcc/config/mips/octeon.md,
* gcc/config/mips/sb1.md, gcc/config/mips/sr71k.md,
(brief_dump_cfg): Take a flags argument, and filter out
TDF_COMMENT and TDF_DETAILS.
* pretty-print.c (pp_base_newline): Set pp_needs_newline to false.
- * gimple-pretty-print.c (dump_gimple_bb_header): Do not use dump_bb_info
- here, it is already called from dump_bb. Idem for check_bb_profile.
+ * gimple-pretty-print.c (dump_gimple_bb_header): Do not use
+ dump_bb_info here, it is already called from dump_bb. Idem for
+ check_bb_profile.
(dump_gimple_bb_footer): Likewise.
(gimple_dump_bb_buff): Call pp_flush after dump_gimple_stmt to
avoid broken dumps for statement histograms.
* passes.c (execute_function_dump): Always call print_rtl_with_bb
for RTL dumps.
* cfgrtl.c (print_rtl_with_bb): Handle printing without an up-to-date
- CFG. With TDF_BLOCKS and TDF_DETAILS, do DF dumps at the top and bottom
- of each basic block.
+ CFG. With TDF_BLOCKS and TDF_DETAILS, do DF dumps at the top and
+ bottom of each basic block.
2012-07-20 Richard Guenther <rguenther@suse.de>
;;; Unused letters:
;;; B H T
-;;; h k v
+;;; h jk v
;; Integer register constraints.
;; It is not necessary to define 'r' here.
(and (not (match_test "TARGET_X32"))
(match_operand 0 "memory_operand")))
-(define_address_constraint "j"
- "@internal Address operand that can be zero extended in LEA instruction."
- (and (not (match_code "const_int"))
- (match_operand 0 "address_operand")))
-
;; Integer constant constraints.
(define_constraint "I"
"Integer constant in the range 0 @dots{} 31, for 32-bit shifts."
int retval = 1;
enum ix86_address_seg seg = SEG_DEFAULT;
+ /* Allow SImode subregs of DImode addresses,
+ they will be emitted with addr32 prefix. */
+ if (TARGET_64BIT && GET_MODE (addr) == SImode)
+ {
+ if (GET_CODE (addr) == SUBREG
+ && GET_MODE (XEXP (addr, 0)) == DImode)
+ addr = SUBREG_REG (addr);
+ }
+
/* Allow zero-extended SImode addresses,
they will be emitted with addr32 prefix. */
- if (TARGET_64BIT && GET_MODE (addr) == DImode)
+ else if (TARGET_64BIT && GET_MODE (addr) == DImode)
{
if (GET_CODE (addr) == ZERO_EXTEND
&& GET_MODE (XEXP (addr, 0)) == SImode)
}
else
{
- /* Print SImode register names for zero-extended
- addresses to force addr32 prefix. */
+ /* Print SImode register names to force addr32 prefix. */
if (TARGET_64BIT
- && (GET_CODE (addr) == ZERO_EXTEND
+ && (GET_CODE (addr) == SUBREG
+ || GET_CODE (addr) == ZERO_EXTEND
|| GET_CODE (addr) == AND))
{
gcc_assert (!code);
unsigned int regno1 = true_regnum (operands[1]);
unsigned int regno2 = true_regnum (operands[2]);
+ /* FIXME: Handle zero-extended addresses. */
+ if (GET_CODE (operands[1]) == ZERO_EXTEND
+ || GET_CODE (operands[1]) == AND)
+ return false;
+
/* Check if we need to optimize. */
if (!TARGET_OPT_AGU || optimize_function_for_size_p (cfun))
return false;
[(set_attr "type" "alu")
(set_attr "mode" "QI")])
-(define_insn_and_split "*lea_1"
- [(set (match_operand:SI 0 "register_operand" "=r")
- (subreg:SI (match_operand:DI 1 "lea_address_operand" "p") 0))]
- "TARGET_64BIT"
- "lea{l}\t{%E1, %0|%0, %E1}"
- "&& reload_completed && ix86_avoid_lea_for_addr (insn, operands)"
- [(const_int 0)]
-{
- ix86_split_lea_for_addr (operands, SImode);
- DONE;
-}
- [(set_attr "type" "lea")
- (set_attr "mode" "SI")])
-
-(define_insn_and_split "*lea<mode>_2"
+(define_insn_and_split "*lea<mode>"
[(set (match_operand:SWI48 0 "register_operand" "=r")
(match_operand:SWI48 1 "lea_address_operand" "p"))]
""
- "lea{<imodesuffix>}\t{%E1, %0|%0, %E1}"
+{
+ rtx addr = operands[1];
+
+ if (GET_CODE (addr) == SUBREG)
+ return "lea{l}\t{%E1, %0|%0, %E1}";
+ else if (GET_CODE (addr) == ZERO_EXTEND
+ || GET_CODE (addr) == AND)
+ return "lea{l}\t{%E1, %k0|%k0, %E1}";
+ else
+ return "lea{<imodesuffix>}\t{%E1, %0|%0, %E1}";
+}
"reload_completed && ix86_avoid_lea_for_addr (insn, operands)"
[(const_int 0)]
{
[(set_attr "type" "lea")
(set_attr "mode" "<MODE>")])
-(define_insn "*lea_3_zext"
- [(set (match_operand:DI 0 "register_operand" "=r")
- (zero_extend:DI
- (subreg:SI (match_operand:DI 1 "lea_address_operand" "j") 0)))]
- "TARGET_64BIT"
- "lea{l}\t{%E1, %k0|%k0, %E1}"
- [(set_attr "type" "lea")
- (set_attr "mode" "SI")])
-
-(define_insn "*lea_4_zext"
- [(set (match_operand:DI 0 "register_operand" "=r")
- (zero_extend:DI
- (match_operand:SI 1 "lea_address_operand" "j")))]
- "TARGET_64BIT"
- "lea{l}\t{%E1, %k0|%k0, %E1}"
- [(set_attr "type" "lea")
- (set_attr "mode" "SI")])
-
-(define_insn "*lea_5_zext"
- [(set (match_operand:DI 0 "register_operand" "=r")
- (and:DI
- (subreg:DI (match_operand:SI 1 "lea_address_operand" "p") 0)
- (match_operand:DI 2 "const_32bit_mask" "n")))]
- "TARGET_64BIT"
- "lea{l}\t{%E1, %k0|%k0, %E1}"
- [(set_attr "type" "lea")
- (set_attr "mode" "SI")])
-
-(define_insn "*lea_6_zext"
- [(set (match_operand:DI 0 "register_operand" "=r")
- (and:DI
- (match_operand:DI 1 "lea_address_operand" "p")
- (match_operand:DI 2 "const_32bit_mask" "n")))]
- "TARGET_64BIT"
- "lea{l}\t{%E1, %k0|%k0, %E1}"
- [(set_attr "type" "lea")
- (set_attr "mode" "SI")])
-
(define_insn "*add<mode>_1"
[(set (match_operand:SWI48 0 "nonimmediate_operand" "=r,rm,r,r")
(plus:SWI48
struct ix86_address parts;
int ok;
- /* LEA handles zero-extend by itself. */
- if (GET_CODE (op) == ZERO_EXTEND
- || GET_CODE (op) == AND)
- return false;
-
ok = ix86_decompose_address (op, &parts);
gcc_assert (ok);
return parts.seg == SEG_DEFAULT;
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