(no commit message)

diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn
index 161c5511e73f581b6a1e8ea397b1b321f5979dbc..c81a504259d17ef7baa330fc42db6964fd6ab927 100644 (file)
--- a/openpower/sv/SimpleV_rationale.mdwn
+++ b/openpower/sv/SimpleV_rationale.mdwn
@@ -892,8 +892,8 @@ the computation. In this case, that's an expensive inconvenience.
 Vertical-First allows *scalar* temporary registers to be utilised
 in the assessment as to whether a particular Vector element should
 be skipped, utilising a straight Branch instruction.  This technique
-is pioneered by Mitch Alsup and is a key feature of his VVM Engine
-in MyISA 66000.  Careful analysis of the registers within the
+is pioneered by Mitch Alsup and is a key feature of his VVM Extension
+to MyISA 66000.  Careful analysis of the registers within the
 Vertical-First Loop allows a Multi-Issue Out-of-Order Engine to
 *amortise in-flight scalar looped operations into SIMD batches*
 as long as the loop is kept small enough to entirely fit into