+2018-08-16 Sam Tebbs <sam.tebbs@arm.com>
+
+ * config/aarch64/aarch64.opt (mlow-precision-recip-sqrt)
+ (mlow-precision-sqrt, mlow-precision-div, mverbose-cost-dump): Replace
+ "Common" with "Target".
+
2018-08-15 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.opt (mmitigate-rop): Mark as deprecated.
Enum(aarch64_ra_sign_scope_t) String(all) Value(AARCH64_FUNCTION_ALL)
mlow-precision-recip-sqrt
-Common Var(flag_mrecip_low_precision_sqrt) Optimization
+Target Var(flag_mrecip_low_precision_sqrt) Optimization
Enable the reciprocal square root approximation. Enabling this reduces
precision of reciprocal square root results to about 16 bits for
single precision and to 32 bits for double precision.
mlow-precision-sqrt
-Common Var(flag_mlow_precision_sqrt) Optimization
+Target Var(flag_mlow_precision_sqrt) Optimization
Enable the square root approximation. Enabling this reduces
precision of square root results to about 16 bits for
single precision and to 32 bits for double precision.
If enabled, it implies -mlow-precision-recip-sqrt.
mlow-precision-div
-Common Var(flag_mlow_precision_div) Optimization
+Target Var(flag_mlow_precision_div) Optimization
Enable the division approximation. Enabling this reduces
precision of division results to about 16 bits for
single precision and to 32 bits for double precision.
-msve-vector-bits=N Set the number of bits in an SVE vector register to N.
mverbose-cost-dump
-Common Undocumented Var(flag_aarch64_verbose_cost)
+Target Undocumented Var(flag_aarch64_verbose_cost)
Enables verbose cost model dumping in the debug dump files.
mtrack-speculation