amd/common: Handle alignment of 96-bit formats.
authorBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Mon, 23 Dec 2019 01:02:20 +0000 (02:02 +0100)
committerBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Sun, 29 Dec 2019 23:02:46 +0000 (00:02 +0100)
addrlib doesn't quite do it right, so do it ourselves.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2162
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
src/amd/common/ac_surface.c

index 81c77e280ae0732f526090de436480d30b402e76..9cc2b9328304901ba6c40456f0304b6b66a69593 100644 (file)
@@ -206,6 +206,17 @@ static int gfx6_compute_level(ADDR_HANDLE addrlib,
                AddrSurfInfoIn->width = align(AddrSurfInfoIn->width, alignment);
        }
 
+       /* addrlib assumes the bytes/pixel is a divisor of 64, which is not
+        * true for r32g32b32 formats. */
+       if (AddrSurfInfoIn->bpp == 96) {
+               assert(config->info.levels == 1);
+               assert(AddrSurfInfoIn->tileMode == ADDR_TM_LINEAR_ALIGNED);
+
+               /* The least common multiple of 64 bytes and 12 bytes/pixel is
+                * 192 bytes, or 16 pixels. */
+               AddrSurfInfoIn->width = align(AddrSurfInfoIn->width, 16);
+       }
+
        if (config->is_3d)
                AddrSurfInfoIn->numSlices = u_minify(config->info.depth, level);
        else if (config->is_cube)