i965/vec4/gen8: Handle the MUL dest hazard exception

Fix one of the few cases where we can't reliable touch the destination hazard
bits. I am explicitly doing this patch individually so it is easy to backport. I
was tempted to do this patch before the previous patch which reorganized the
code, but I believe even doing that first, this is still easy to backport.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84212
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index 655299472fff118aea8993c1fa55c272c616f613..f1d59bda8462458608aeed3653a27870b05c81cb 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -841,9 +841,25 @@ vec4_visitor::move_push_constants_to_pull_constants()
 }
 
 /* Conditions for which we want to avoid setting the dependency control bits */
-static bool
-is_dep_ctrl_unsafe(const vec4_instruction *inst)
+bool
+vec4_visitor::is_dep_ctrl_unsafe(const vec4_instruction *inst)
 {
+#define IS_DWORD(reg) \
+   (reg.type == BRW_REGISTER_TYPE_UD || \
+    reg.type == BRW_REGISTER_TYPE_D)
+
+   /* From the destination hazard section of the spec:
+    * > Instructions other than send, may use this control as long as operations
+    * > that have different pipeline latencies are not mixed.
+    */
+   if (brw->gen >= 8) {
+      if (inst->opcode == BRW_OPCODE_MUL &&
+         IS_DWORD(inst->src[0]) &&
+         IS_DWORD(inst->src[1]))
+         return true;
+   }
+#undef IS_DWORD
+
    /*
     * mlen:
     * In the presence of send messages, totally interrupt dependency

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index 44aea0ea8ee61712cd98ff5cb43b96bffbe1dc4d..aac5954557c75181470e0e1a8ee6b2f7fcaa5960 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -390,6 +390,7 @@ public:
    bool opt_cse();
    bool opt_algebraic();
    bool opt_register_coalesce();
+   bool is_dep_ctrl_unsafe(const vec4_instruction *inst);
    void opt_set_dependency_control();
    void opt_schedule_instructions();