+2017-04-05 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/80298
+ * config/i386/mmintrin.h: Add -msse target option when __SSE__ is
+ not defined for x86_64 target. Add -mmmx target option when __SSE2__
+ is not defined.
+ * config/i386/mm3dnow.h: Add -msse target when __SSE__ is not defined
+ for x86_64 target. Handle -m3dnowa option.
+
2017-04-05 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/70703
#include <mmintrin.h>
#include <prfchwintrin.h>
-#ifndef __3dNOW__
+#if defined __x86_64__ && !defined __SSE__ || !defined __3dNOW__
#pragma GCC push_options
+#ifdef __x86_64__
+#pragma GCC target("sse,3dnow")
+#else
#pragma GCC target("3dnow")
+#endif
#define __DISABLE_3dNOW__
#endif /* __3dNOW__ */
return __tmp.a[0];
}
-#ifdef __3dNOW_A__
+#ifdef __DISABLE_3dNOW__
+#undef __DISABLE_3dNOW__
+#pragma GCC pop_options
+#endif /* __DISABLE_3dNOW__ */
+
+#if defined __x86_64__ && !defined __SSE__ || !defined __3dNOW_A__
+#pragma GCC push_options
+#ifdef __x86_64__
+#pragma GCC target("sse,3dnowa")
+#else
+#pragma GCC target("3dnowa")
+#endif
+#define __DISABLE_3dNOW_A__
+#endif /* __3dNOW_A__ */
extern __inline __m64 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_m_pf2iw (__m64 __A)
return (__m64)__builtin_ia32_pswapdsf ((__v2sf)__A);
}
-#endif /* __3dNOW_A__ */
-
-#ifdef __DISABLE_3dNOW__
-#undef __DISABLE_3dNOW__
+#ifdef __DISABLE_3dNOW_A__
+#undef __DISABLE_3dNOW_A__
#pragma GCC pop_options
-#endif /* __DISABLE_3dNOW__ */
+#endif /* __DISABLE_3dNOW_A__ */
#endif /* _MM3DNOW_H_INCLUDED */
#ifndef _MMINTRIN_H_INCLUDED
#define _MMINTRIN_H_INCLUDED
-#ifndef __MMX__
+#if defined __x86_64__ && !defined __SSE__ || !defined __MMX__
#pragma GCC push_options
+#ifdef __x86_64__
+#pragma GCC target("sse,mmx")
+#else
#pragma GCC target("mmx")
+#endif
#define __DISABLE_MMX__
#endif /* __MMX__ */
/* Add the 64-bit values in M1 to the 64-bit values in M2. */
#ifndef __SSE2__
#pragma GCC push_options
-#pragma GCC target("sse2")
+#pragma GCC target("sse2,mmx")
#define __DISABLE_SSE2__
#endif /* __SSE2__ */
/* Add the 64-bit values in M1 to the 64-bit values in M2. */
#ifndef __SSE2__
#pragma GCC push_options
-#pragma GCC target("sse2")
+#pragma GCC target("sse2,mmx")
#define __DISABLE_SSE2__
#endif /* __SSE2__ */