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add notes about QSPI
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 21 Mar 2018 17:08:26 +0000 (17:08 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 21 Mar 2018 17:08:26 +0000 (17:08 +0000)
shakti/m_class/QSPI.mdwn patch | blob | history

diff --git a/shakti/m_class/QSPI.mdwn b/shakti/m_class/QSPI.mdwn
index 59981db6132f142ce8ee6a52017e032f7cfcbcaa..0c99bcd569919c4c165b5a705b7a96237d6116a2 100644 (file)
--- a/shakti/m_class/QSPI.mdwn
+++ b/shakti/m_class/QSPI.mdwn
@@ -1,5 +1,8 @@
 # Quad SPI
 
-see also [[SPI]]
+see also [[SPI]].
+
+QSPI code supports single, dual, quad lanes.
+also supports both SDR and DDR modes.
 
 * <https://bitbucket.org/casl/c-class/src/3fba75dfbd0c64815eb8ec6dc965666812c44bae/src/peripherals/qspi/?at=master>
http://libre-riscv.org ikiwiki