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whoops must only be PredicateBaseRM in CROpFF5RM
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 6 Oct 2022 11:51:42 +0000 (12:51 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Thu, 6 Oct 2022 11:51:42 +0000 (12:51 +0100)
src/openpower/decoder/power_insn.py patch | blob | history

diff --git a/src/openpower/decoder/power_insn.py b/src/openpower/decoder/power_insn.py
index 6099c817f3e08090e12932cfcbfa9c3a950a075a..5712f5cab09f80c2e9c3059c401bd54cc8e82c3d 100644 (file)
--- a/src/openpower/decoder/power_insn.py
+++ b/src/openpower/decoder/power_insn.py
@@ -1747,7 +1747,7 @@ class CROpFF3RM(VLiBaseRM, ZZBaseRM, CROpBaseRM):
         yield from super().specifiers(record=record, mode="ff")
 
 
-class CROpFF5RM(FFPRRc0BaseRM, PredicateWidthBaseRM,
+class CROpFF5RM(FFPRRc0BaseRM, PredicateBaseRM,
                 VLiBaseRM, DZBaseRM, SZBaseRM, CROpBaseRM):
     """cr_op: ffirst 5-bit mode"""
     VLi: BaseRM[20]