+2016-09-01 Segher Boessenkool <segher@kernel.crashing.org>
+
+ * config/rs6000/altivec.md (*save_world, *save_vregs_<mode>_r11,
+ save_vregs_<mode>_r12, *restore_vregs_<mode>_r11,
+ *restore_vregs_<mode>_r12): Use LR_REGNO instead of 65.
+ * config/rs6000/darwin.md (load_macho_picbase, load_macho_picbase_si,
+ load_macho_picbase_di, *call_indirect_nonlocal_darwin64,
+ *call_nonlocal_darwin64, *call_value_indirect_nonlocal_darwin64,
+ *call_value_nonlocal_darwin64, reload_macho_picbase,
+ reload_macho_picbase_si, reload_macho_picbase_di): Ditto.
+ * config/rs6000/rs6000.h (RETURN_ADDR_IN_PREVIOUS_FRAME): Ditto.
+ * config/rs6000/rs6000.md (*save_gpregs_<mode>_r11,
+ *save_gpregs_<mode>_r12, *save_gpregs_<mode>_r1,
+ *save_fpregs_<mode>_r11, *save_fpregs_<mode>_r12,
+ *save_fpregs_<mode>_r1): Ditto.
+ * config/rs6000/spe.md (*save_gpregs_spe, *restore_gpregs_spe,
+ *return_and_restore_gpregs_spe): Ditto.
+
2016-09-01 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/rs6000.md
(define_insn "*save_world"
[(match_parallel 0 "save_world_operation"
- [(clobber (reg:SI 65))
+ [(clobber (reg:SI LR_REGNO))
(use (match_operand:SI 1 "call_operand" "s"))])]
"TARGET_MACHO && (DEFAULT_ABI == ABI_DARWIN) && TARGET_32BIT"
"bl %z1"
(define_insn "*restore_world"
[(match_parallel 0 "restore_world_operation"
[(return)
- (use (reg:SI 65))
+ (use (reg:SI LR_REGNO))
(use (match_operand:SI 1 "call_operand" "s"))
(clobber (match_operand:SI 2 "gpc_reg_operand" "=r"))])]
"TARGET_MACHO && (DEFAULT_ABI == ABI_DARWIN) && TARGET_32BIT"
;; to describe the operation to dwarf2out_frame_debug_expr.
(define_insn "*save_vregs_<mode>_r11"
[(match_parallel 0 "any_parallel_operand"
- [(clobber (reg:P 65))
+ [(clobber (reg:P LR_REGNO))
(use (match_operand:P 1 "symbol_ref_operand" "s"))
(clobber (reg:P 11))
(use (reg:P 0))
(define_insn "*save_vregs_<mode>_r12"
[(match_parallel 0 "any_parallel_operand"
- [(clobber (reg:P 65))
+ [(clobber (reg:P LR_REGNO))
(use (match_operand:P 1 "symbol_ref_operand" "s"))
(clobber (reg:P 12))
(use (reg:P 0))
(define_insn "*restore_vregs_<mode>_r11"
[(match_parallel 0 "any_parallel_operand"
- [(clobber (reg:P 65))
+ [(clobber (reg:P LR_REGNO))
(use (match_operand:P 1 "symbol_ref_operand" "s"))
(clobber (reg:P 11))
(use (reg:P 0))
(define_insn "*restore_vregs_<mode>_r12"
[(match_parallel 0 "any_parallel_operand"
- [(clobber (reg:P 65))
+ [(clobber (reg:P LR_REGNO))
(use (match_operand:P 1 "symbol_ref_operand" "s"))
(clobber (reg:P 12))
(use (reg:P 0))
"")
(define_expand "load_macho_picbase"
- [(set (reg:SI 65)
+ [(set (reg:SI LR_REGNO)
(unspec [(match_operand 0 "" "")]
UNSPEC_LD_MPIC))]
"(DEFAULT_ABI == ABI_DARWIN) && flag_pic"
})
(define_insn "load_macho_picbase_si"
- [(set (reg:SI 65)
+ [(set (reg:SI LR_REGNO)
(unspec:SI [(match_operand:SI 0 "immediate_operand" "s")
(pc)] UNSPEC_LD_MPIC))]
"(DEFAULT_ABI == ABI_DARWIN) && flag_pic"
(set_attr "length" "4")])
(define_insn "load_macho_picbase_di"
- [(set (reg:DI 65)
+ [(set (reg:DI LR_REGNO)
(unspec:DI [(match_operand:DI 0 "immediate_operand" "s")
(pc)] UNSPEC_LD_MPIC))]
"(DEFAULT_ABI == ABI_DARWIN) && flag_pic && TARGET_64BIT"
[(call (mem:SI (match_operand:DI 0 "register_operand" "c,*l,c,*l"))
(match_operand 1 "" "g,g,g,g"))
(use (match_operand:SI 2 "immediate_operand" "O,O,n,n"))
- (clobber (reg:SI 65))]
+ (clobber (reg:SI LR_REGNO))]
"DEFAULT_ABI == ABI_DARWIN && TARGET_64BIT"
{
return "b%T0l";
[(call (mem:SI (match_operand:DI 0 "symbol_ref_operand" "s,s"))
(match_operand 1 "" "g,g"))
(use (match_operand:SI 2 "immediate_operand" "O,n"))
- (clobber (reg:SI 65))]
+ (clobber (reg:SI LR_REGNO))]
"(DEFAULT_ABI == ABI_DARWIN)
&& (INTVAL (operands[2]) & CALL_LONG) == 0"
{
(call (mem:SI (match_operand:DI 1 "register_operand" "c,*l,c,*l"))
(match_operand 2 "" "g,g,g,g")))
(use (match_operand:SI 3 "immediate_operand" "O,O,n,n"))
- (clobber (reg:SI 65))]
+ (clobber (reg:SI LR_REGNO))]
"DEFAULT_ABI == ABI_DARWIN"
{
return "b%T1l";
(call (mem:SI (match_operand:DI 1 "symbol_ref_operand" "s,s"))
(match_operand 2 "" "g,g")))
(use (match_operand:SI 3 "immediate_operand" "O,n"))
- (clobber (reg:SI 65))]
+ (clobber (reg:SI LR_REGNO))]
"(DEFAULT_ABI == ABI_DARWIN)
&& (INTVAL (operands[3]) & CALL_LONG) == 0"
{
(set_attr "length" "4,8")])
(define_expand "reload_macho_picbase"
- [(set (reg:SI 65)
+ [(set (reg:SI LR_REGNO)
(unspec [(match_operand 0 "" "")]
UNSPEC_RELD_MPIC))]
"(DEFAULT_ABI == ABI_DARWIN) && flag_pic"
})
(define_insn "reload_macho_picbase_si"
- [(set (reg:SI 65)
+ [(set (reg:SI LR_REGNO)
(unspec:SI [(match_operand:SI 0 "immediate_operand" "s")
(pc)] UNSPEC_RELD_MPIC))]
"(DEFAULT_ABI == ABI_DARWIN) && flag_pic"
(set_attr "length" "4")])
(define_insn "reload_macho_picbase_di"
- [(set (reg:DI 65)
+ [(set (reg:DI LR_REGNO)
(unspec:DI [(match_operand:DI 0 "immediate_operand" "s")
(pc)] UNSPEC_RELD_MPIC))]
"(DEFAULT_ABI == ABI_DARWIN) && flag_pic && TARGET_64BIT"
#define TRAMPOLINE_SIZE rs6000_trampoline_size ()
\f
/* Definitions for __builtin_return_address and __builtin_frame_address.
- __builtin_return_address (0) should give link register (65), enable
+ __builtin_return_address (0) should give link register (LR_REGNO), enable
this. */
/* This should be uncommented, so that the link register is used, but
currently this would result in unmatched insns and spilling fixed
(define_insn "*save_gpregs_<mode>_r11"
[(match_parallel 0 "any_parallel_operand"
- [(clobber (reg:P 65))
+ [(clobber (reg:P LR_REGNO))
(use (match_operand:P 1 "symbol_ref_operand" "s"))
(use (reg:P 11))
(set (match_operand:P 2 "memory_operand" "=m")
(define_insn "*save_gpregs_<mode>_r12"
[(match_parallel 0 "any_parallel_operand"
- [(clobber (reg:P 65))
+ [(clobber (reg:P LR_REGNO))
(use (match_operand:P 1 "symbol_ref_operand" "s"))
(use (reg:P 12))
(set (match_operand:P 2 "memory_operand" "=m")
(define_insn "*save_gpregs_<mode>_r1"
[(match_parallel 0 "any_parallel_operand"
- [(clobber (reg:P 65))
+ [(clobber (reg:P LR_REGNO))
(use (match_operand:P 1 "symbol_ref_operand" "s"))
(use (reg:P 1))
(set (match_operand:P 2 "memory_operand" "=m")
(define_insn "*save_fpregs_<mode>_r11"
[(match_parallel 0 "any_parallel_operand"
- [(clobber (reg:P 65))
+ [(clobber (reg:P LR_REGNO))
(use (match_operand:P 1 "symbol_ref_operand" "s"))
(use (reg:P 11))
(set (match_operand:DF 2 "memory_operand" "=m")
(define_insn "*save_fpregs_<mode>_r12"
[(match_parallel 0 "any_parallel_operand"
- [(clobber (reg:P 65))
+ [(clobber (reg:P LR_REGNO))
(use (match_operand:P 1 "symbol_ref_operand" "s"))
(use (reg:P 12))
(set (match_operand:DF 2 "memory_operand" "=m")
(define_insn "*save_fpregs_<mode>_r1"
[(match_parallel 0 "any_parallel_operand"
- [(clobber (reg:P 65))
+ [(clobber (reg:P LR_REGNO))
(use (match_operand:P 1 "symbol_ref_operand" "s"))
(use (reg:P 1))
(set (match_operand:DF 2 "memory_operand" "=m")
;; Out-of-line prologues and epilogues.
(define_insn "*save_gpregs_spe"
[(match_parallel 0 "any_parallel_operand"
- [(clobber (reg:P 65))
+ [(clobber (reg:P LR_REGNO))
(use (match_operand:P 1 "symbol_ref_operand" "s"))
(use (reg:P 11))
(set (match_operand:V2SI 2 "memory_operand" "=m")
(define_insn "*restore_gpregs_spe"
[(match_parallel 0 "any_parallel_operand"
- [(clobber (reg:P 65))
+ [(clobber (reg:P LR_REGNO))
(use (match_operand:P 1 "symbol_ref_operand" "s"))
(use (reg:P 11))
(set (match_operand:V2SI 2 "gpc_reg_operand" "=r")
(define_insn "*return_and_restore_gpregs_spe"
[(match_parallel 0 "any_parallel_operand"
[(return)
- (clobber (reg:P 65))
+ (clobber (reg:P LR_REGNO))
(use (match_operand:P 1 "symbol_ref_operand" "s"))
(use (reg:P 11))
(set (match_operand:V2SI 2 "gpc_reg_operand" "=r")