i965: Use Haswell's sample_d_c for textureGrad with shadow samplers.
authorKenneth Graunke <kenneth@whitecape.org>
Fri, 4 Jan 2013 15:53:09 +0000 (07:53 -0800)
committerKenneth Graunke <kenneth@whitecape.org>
Tue, 8 Jan 2013 00:48:02 +0000 (16:48 -0800)
The new hardware actually just supports this now.

Reviewed-by: Eric Anholt <eric@anholt.net>
src/mesa/drivers/dri/i965/brw_defines.h
src/mesa/drivers/dri/i965/brw_fs_emit.cpp
src/mesa/drivers/dri/i965/brw_shader.cpp
src/mesa/drivers/dri/i965/brw_vec4_emit.cpp

index 1d0cf0275d10e5877c9824ad0c03a8e1f2a086c8..41d60aa7d45166ac56eb37aaddda1b705cb63d39 100644 (file)
@@ -875,6 +875,7 @@ enum brw_message_target {
 #define GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE  6
 #define GEN5_SAMPLER_MESSAGE_SAMPLE_LD           7
 #define GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO      10
+#define HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE 20
 #define GEN7_SAMPLER_MESSAGE_SAMPLE_LD_MCS       29
 #define GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DMS       30
 #define GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS       31
index 305993401ea4df4a3cafc48b56c13389b2200824..324e6656d1fabc88fa8d4c397a5466c49a02f654 100644 (file)
@@ -387,8 +387,13 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src
         msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO;
         break;
       case SHADER_OPCODE_TXD:
-        /* There is no sample_d_c message; comparisons are done manually */
-        msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS;
+         if (inst->shadow_compare) {
+            /* Gen7.5+.  Otherwise, lowered by brw_lower_texture_gradients(). */
+            assert(intel->is_haswell);
+            msg_type = HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE;
+         } else {
+            msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS;
+         }
         break;
       case SHADER_OPCODE_TXF:
         msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_LD;
index 1e8d57485ad72cd8a6e613b8718350cf3cc0ce87..7539d542f2ce403e6e2ed3541ba022dfee7ca9cb 100644 (file)
@@ -128,7 +128,8 @@ brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
         lower_if_to_cond_assign(shader->ir, 16);
 
       do_lower_texture_projection(shader->ir);
-      brw_lower_texture_gradients(shader->ir);
+      if (intel->gen < 8 && !intel->is_haswell)
+         brw_lower_texture_gradients(shader->ir);
       do_vec_index_to_cond_assign(shader->ir);
       brw_do_cubemap_normalize(shader->ir);
       lower_noise(shader->ir);
index 9fa742d740c64be84a5b1911e9cecdcaf5d3ff7a..747edc29a13496ea253482f532b7d90ec3fa1a27 100644 (file)
@@ -278,8 +278,13 @@ vec4_generator::generate_tex(vec4_instruction *inst,
         }
         break;
       case SHADER_OPCODE_TXD:
-        /* There is no sample_d_c message; comparisons are done manually. */
-        msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS;
+         if (inst->shadow_compare) {
+            /* Gen7.5+.  Otherwise, lowered by brw_lower_texture_gradients(). */
+            assert(intel->is_haswell);
+            msg_type = HSW_SAMPLER_MESSAGE_SAMPLE_DERIV_COMPARE;
+         } else {
+            msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS;
+         }
         break;
       case SHADER_OPCODE_TXF:
         msg_type = GEN5_SAMPLER_MESSAGE_SAMPLE_LD;