re PR target/37169 (Inefficent code for _mm_cvtsi64_si128)

gcc/

2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/37169
	* config/i386/i386.c (ix86_expand_vector_init_one_nonzero): In
	V2DI mode, for SSE4.1, use movq instead of vector set if the
	second element is zero and inter-unit moves are OK.

gcc/testsuite/

2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/37169
	* i386/sse2-init-v2di-2.c: New.

From-SVN: r139289

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index af90a99ca22ec972ff5f9f52a5e4422e43ce8ea7..afe8e5950e8016aba9285bccc52fc641005c5ebf 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR target/37169
+       * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): In
+       V2DI mode, for SSE4.1, use movq instead of vector set if the
+       second element is zero and inter-unit moves are OK.
+
 2008-08-20  Richard Guenther  <rguenther@suse.de>
 
        * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): More
@@ -16,7 +23,7 @@
        support of this feature.  Do not assume that a sufficiently new
        assembler will support the feature regardless of the target type.
        (HAVE_GAS_CFI_PERSONALITY_DIRECTIVE): Likewise.
-        * configure: Regenerate.
+       * configure: Regenerate.
 
 2008-08-20  Richard Guenther  <rguenther@suse.de>
 
@@ -389,24 +396,24 @@
 
        * config/s390/2097.md New file.
        * config/s390/s390.md ("z10prop" attribute): Define none,
-        z10_super, z10_super_E1, z10_super_A1, z10_super_c,
-        z10_super_c_E1, z10_fwd, z10_fwd_A1, z10_fwd_A3, z10_fwd_E1,
-        z10_rec, z10_fr, z10_fr_A3, z10_fr_E1, z10_c, and z10_cobra as
-        possible values and apply them to insns as appropriate.
-        ("type" attribute): Removed itof and added ftrunctf,ftruncdf,
-        ftruncsd, ftruncdd, itoftf, itofdf, itofsf, itofdd, itoftd,
-        fdivdd, fdivtd, floaddd, floadsd, fmuldd, fmultd, fsimpdd,
-        fsimpsd, fsimptd, fstoredd, fstoresd, ftoidfp as possible
-        values.
+       z10_super, z10_super_E1, z10_super_A1, z10_super_c,
+       z10_super_c_E1, z10_fwd, z10_fwd_A1, z10_fwd_A3, z10_fwd_E1,
+       z10_rec, z10_fr, z10_fr_A3, z10_fr_E1, z10_c, and z10_cobra as
+       possible values and apply them to insns as appropriate.
+       ("type" attribute): Removed itof and added ftrunctf,ftruncdf,
+       ftruncsd, ftruncdd, itoftf, itofdf, itofsf, itofdd, itoftd,
+       fdivdd, fdivtd, floaddd, floadsd, fmuldd, fmultd, fsimpdd,
+       fsimpsd, fsimptd, fstoredd, fstoresd, ftoidfp as possible
+       values.
        ("bfp" mode attribute): Removed.  Every occurence replaced
        with <mode>.
        * config/s390/s390.c (struct "z10_cost"): Updated entries.
        * config/s390/2084.md (insn_reservation "x_itof"): Updated
-          type attribute.
+         type attribute.
 
 2008-08-14  Manuel Lopez-Ibanez  <manu@gcc.gnu.org>
 
-        PR c/28152
+       PR c/28152
        * c-parser.c (c_lex_one_token): Do not store the canonical spelling
        for keywords.
        

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 8da85e16e5c455b1554f73f433a22ba82868e418..13d81476370fe38a1e24767a6ae7a84d5dfbb8ab 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -25104,7 +25104,13 @@ ix86_expand_vector_init_one_nonzero (bool mmx_ok, enum machine_mode mode,
   switch (mode)
     {
     case V2DImode:
-      use_vector_set = TARGET_64BIT && TARGET_SSE4_1;
+      /* For SSE4.1, we normally use vector set.  But if the second
+        element is zero and inter-unit moves are OK, we use movq
+        instead.  */
+      use_vector_set = (TARGET_64BIT
+                       && TARGET_SSE4_1
+                       && !(TARGET_INTER_UNIT_MOVES
+                            && one_var == 0));
       break;
     case V16QImode:
     case V4SImode:

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 36c0c41d6b86c891804c3b0efaaa2fa4dc26af9a..ac215ebf7f4c95a6fe662dc2017ddb9c6b878d70 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR target/37169
+       * i386/sse2-init-v2di-2.c: New.
+
 2008-08-20  Richard Guenther  <rguenther@suse.de>
 
        * gcc.dg/tree-ssa/forwprop-9.c: Scan FRE dump as well.
@@ -47,7 +52,7 @@
 
 2008-08-20  Victor Kaplansky  <victork@il.ibm.com>
 
-        * gcc.dg/vect/vect-multitypes-15.c: Fix typo.
+       * gcc.dg/vect/vect-multitypes-15.c: Fix typo.
        * gcc/testsuite/lib/target-supports.exp
           (check_effective_target_vect_long_long): Remove spu-*-*.
        * gcc.dg/vect/vect-multitypes-16.c: Make init loop unvectorizable.
@@ -278,7 +283,7 @@
 
 2008-08-14  Manuel Lopez-Ibanez  <manu@gcc.gnu.org>
 
-        PR c/28152
+       PR c/28152
        * gcc.dg/parser-pr28152.c: New.
        * gcc.dg/parser-pr28152-2.c: New.
 

diff --git a/gcc/testsuite/gcc.target/i386/sse2-init-v2di-2.c b/gcc/testsuite/gcc.target/i386/sse2-init-v2di-2.c
new file mode 100644 (file)
index 0000000..da36efa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/sse2-init-v2di-2.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-O2 -msse4 -march=core2" } */
+
+#include <emmintrin.h>
+
+__m128i
+test (long long b)
+{
+  return _mm_cvtsi64_si128 (b); 
+}
+
+/* { dg-final { scan-assembler "movq" } } */