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tests: tidy up testcase
author
Eddie Hung
<eddie@fpgeh.com>
Wed, 3 Jun 2020 15:41:55 +0000
(08:41 -0700)
committer
Eddie Hung
<eddie@fpgeh.com>
Wed, 3 Jun 2020 15:41:55 +0000
(08:41 -0700)
tests/arch/ecp5/latches_abc9.ys
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diff --git
a/tests/arch/ecp5/latches_abc9.ys
b/tests/arch/ecp5/latches_abc9.ys
index ca3182254b15118b84d7f92e0dda611305dff165..4daf04050b8a404a585cd54d69f57fd8e7a09741 100644
(file)
--- a/
tests/arch/ecp5/latches_abc9.ys
+++ b/
tests/arch/ecp5/latches_abc9.ys
@@
-7,9
+7,6
@@
always @*
assign q = ~l;
endmodule
EOT
-proc
-design -save gold
-
# Can't run any sort of equivalence check because latches are blown to LUTs
synth_ecp5 -abc9
select -assert-count 2 t:LUT4