Fix $lut pin ordering inside $__ICE40_CARRY_WRAPPER

diff --git a/techlibs/ice40/cells_map.v b/techlibs/ice40/cells_map.v
index 0c10c9ac4cf6a1e12b3d49e7e4818b5f9152067e..662423f0ae2f198a0ee49387476e010e49e827be 100644 (file)
--- a/techlibs/ice40/cells_map.v
+++ b/techlibs/ice40/cells_map.v
@@ -75,7 +75,7 @@ module \$__ICE40_CARRY_WRAPPER (output CO, O, input A, B, CI, I0, I3);
     .WIDTH(4),
     .LUT(LUT)
   ) lut (
-    .A({I3,B,A,I0}),
+    .A({I0,A,B,I3}),
     .Y(O)
   );
 endmodule