break;
}
+ case nir_op_pack_double_2x32_split: {
+ dst_reg result = dst_reg(this, glsl_type::dvec4_type);
+ dst_reg tmp = dst_reg(this, glsl_type::uvec4_type);
+ emit(MOV(tmp, retype(op[0], BRW_REGISTER_TYPE_UD)));
+ emit(VEC4_OPCODE_SET_LOW_32BIT, result, src_reg(tmp));
+ emit(MOV(tmp, retype(op[1], BRW_REGISTER_TYPE_UD)));
+ emit(VEC4_OPCODE_SET_HIGH_32BIT, result, src_reg(tmp));
+ emit(MOV(dst, src_reg(result)));
+ break;
+ }
+
case nir_op_unpack_double_2x32_split_x:
case nir_op_unpack_double_2x32_split_y: {
enum opcode oper = (instr->op == nir_op_unpack_double_2x32_split_x) ?