Bugfix in $memrd sharing
authorClifford Wolf <clifford@clifford.at>
Mon, 7 Jan 2019 09:01:11 +0000 (10:01 +0100)
committerClifford Wolf <clifford@clifford.at>
Mon, 7 Jan 2019 09:04:47 +0000 (10:04 +0100)
Signed-off-by: Clifford Wolf <clifford@clifford.at>
passes/opt/share.cc

index b8028082905cbf8d5b6ca3cb65d63b9c80de8259..c85c2742712a6f9a5c2d9e403c368d989a070608 100644 (file)
@@ -710,8 +710,12 @@ struct ShareWorker
                        RTLIL::Cell *supercell = module->addCell(NEW_ID, c1);
                        RTLIL::SigSpec addr1 = c1->getPort("\\ADDR");
                        RTLIL::SigSpec addr2 = c2->getPort("\\ADDR");
-                       if (addr1 != addr2)
-                               supercell->setPort("\\ADDR", module->Mux(NEW_ID, addr2, addr1, act));
+                       if (GetSize(addr1) < GetSize(addr2))
+                               addr1.extend_u0(GetSize(addr2));
+                       else
+                               addr2.extend_u0(GetSize(addr1));
+                       supercell->setPort("\\ADDR", addr1 != addr2 ? module->Mux(NEW_ID, addr2, addr1, act) : addr1);
+                       supercell->parameters["\\ABITS"] = RTLIL::Const(GetSize(addr1));
                        supercell_aux.insert(module->addPos(NEW_ID, supercell->getPort("\\DATA"), c2->getPort("\\DATA")));
                        supercell_aux.insert(supercell);
                        return supercell;