i965/gen8: Make disassembly function match brw's signature.
authorMatt Turner <mattst88@gmail.com>
Fri, 9 May 2014 00:27:31 +0000 (17:27 -0700)
committerMatt Turner <mattst88@gmail.com>
Thu, 15 May 2014 22:45:40 +0000 (15:45 -0700)
gen8_dump_compile will be called indirectly by code common used by
generations before and after the gen8 instruction format change.

Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
src/mesa/drivers/dri/i965/gen8_fs_generator.cpp
src/mesa/drivers/dri/i965/gen8_generator.cpp
src/mesa/drivers/dri/i965/gen8_generator.h
src/mesa/drivers/dri/i965/gen8_vec4_generator.cpp

index de06a97b2ecef1dd35e1ea2369499b241e595bfc..d25da817062f33b83cbe7742a7b2cb2482471721 100644 (file)
@@ -1293,7 +1293,7 @@ gen8_fs_generator::generate_code(exec_list *instructions)
       }
 
       if (unlikely(INTEL_DEBUG & DEBUG_WM)) {
-         disassemble(stderr, last_native_inst_offset, next_inst_offset);
+         gen8_dump_compile(brw, store, last_native_inst_offset, next_inst_offset, stderr);
 
          foreach_list(node, &cfg->block_list) {
             bblock_link *link = (bblock_link *)node;
@@ -1327,7 +1327,7 @@ gen8_fs_generator::generate_code(exec_list *instructions)
     * case you're doing that.
     */
    if (0 && unlikely(INTEL_DEBUG & DEBUG_WM)) {
-      disassemble(stderr, 0, next_inst_offset);
+      gen8_dump_compile(brw, store, 0, next_inst_offset, stderr);
    }
 }
 
index faca9c08835a76d73aedf478ed25a8f5d76e2fc3..774df183ff53cb2d84ef5736818e2a26d2fd41ea 100644 (file)
@@ -620,13 +620,14 @@ gen8_generator::HALT()
    return inst;
 }
 
-void
-gen8_generator::disassemble(FILE *out, int start, int end)
+extern "C" void
+gen8_dump_compile(struct brw_context *brw, void *assembly,
+                  int start,int end, FILE *out)
 {
    bool dump_hex = false;
 
    for (int offset = start; offset < end; offset += 16) {
-      gen8_instruction *inst = &store[offset / 16];
+      gen8_instruction *inst = &((gen8_instruction *)assembly)[offset / 16];
       fprintf(stderr, "0x%08x: ", offset);
 
       if (dump_hex) {
index b144809668dfa2ad50de4b8890ea9de4f2010b51..b6ed24c1f33ecd552dc099f7981d3a5435fdb3d6 100644 (file)
@@ -117,8 +117,6 @@ public:
    gen8_instruction *NOP();
    /** @} */
 
-   void disassemble(FILE *out, int start, int end);
-
 protected:
    gen8_instruction *alu3(unsigned opcode,
                           struct brw_reg dst,
@@ -196,3 +194,7 @@ protected:
 
    void *mem_ctx;
 };
+
+extern "C" void
+gen8_dump_compile(struct brw_context *brw, void *assembly,
+                  int start,int end, FILE *out);
index 1d833120d7720fe17d9731a53e910ead02b45c8b..0c54e6ddd749d5aa9a865b74853bb91bb7be564e 100644 (file)
@@ -910,7 +910,7 @@ gen8_vec4_generator::generate_code(exec_list *instructions)
       }
 
       if (unlikely(debug_flag)) {
-         disassemble(stderr, last_native_inst_offset, next_inst_offset);
+         gen8_dump_compile(brw, store, last_native_inst_offset, next_inst_offset, stderr);
       }
 
       last_native_inst_offset = next_inst_offset;
@@ -928,7 +928,7 @@ gen8_vec4_generator::generate_code(exec_list *instructions)
     * case you're doing that.
     */
    if (0 && unlikely(debug_flag)) {
-      disassemble(stderr, 0, next_inst_offset);
+      gen8_dump_compile(brw, store, 0, next_inst_offset, stderr);
    }
 }